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Re: [ts-7000] Re: ts7200 won't boot into redboot... I erased flash and k

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Subject: Re: [ts-7000] Re: ts7200 won't boot into redboot... I erased flash and killed it....
From: Curtis Monroe <>
Date: Tue, 6 Jun 2006 10:13:19 -0400
Before using SerialBlaster test you watchdog fix. Look at the red light on the 
TS7200 it will flash every watchdog reset. On my TS7200 it flashes every 
second. You can use this to test if your hardware fix worked.

Even better you can open up a MINICOM serial connection to the board at 
9600-N-8-1 and watch the '<' characters that are sent at reboot. You need 3 
to 4 seconds to send the boot loader to the board.

As for the internal EP9301 watchdog, I doubt it is being set, I don't see any 
code in the TS-BOOTROM to dissable it. It would defeat the purpose of haveing 
an external watchdog if left enabled, and the schematic indicated it is "PU" 
pulled up.

U21 if under the CF connector, it is close to the jumers and has pin 1 and 16 
near the edge of the board. I think uhmgawa must be looking at another chip. 
The CPLD is visible on the board but not U21 (the binary counter).

-Curtis.



On June 5, 2006 09:20 pm, zeener zits wrote:
> I will try grounding U19 pin 58 and retry the serial blaster.
>  If it does not work then I will insert a momentary switch (no) into the 
circuit to provide the additional reset you are referring to. (after further 
investigation onto proper placement in the circuit).
>  
> 
> uhmgawa <> wrote:    Curtis Monroe wrote:
>  > I tried to serial boot my TS-7200 today. Its watchdog is set for 1 
second. So 
>  > it's impossible to serial boot it without hardware modifications, (or a 
CPLD 
>  > reprogram).
>  
>  This is really interesting.  I can't imagine why such a short
>  duration WDT reset would be configured.  2Hz exits the CD4020
>  which is being further divided by u19 which is generating the
>  9302 reset.  So it is possible a shorter divider chain was
>  configured.
>  
>  If u21 is obscured by the particular CF connector on your
>  board (note it isn't on the board sitting in front of me
>  nor AFAICT on the board pic displayed on TS's site), you
>  can follow the connection from u19.58 which is the 2Hz input
>  to the CPLD.  The trace runs partly on the bottom layer
>  and easily accessible.  I'd probably try temporarily
>  grounding a trace via to attempt disabling the associated
>  watch dog.
>  
>  > The EP9301 on my board downloads the serial boot program at 9600bps. It 
can 
>  > only load 960 Bytes in one second. Not even half of the 2048 Bytes needed 
to 
>  > load the SerialBlaster Boot loader.
>  
>  The other possibility is you are hitting the 93xx internal
>  WDT timeout causing a reset.  This must be disabled by
>  pulling -CS1 low during reset according to the manual,  It
>  also ventures to u19.58 which may be doing so.
>  
>  However the internal WDT kicked reset looks to be more on the
>  order of 0.5s (256ms WDT timeout + 256ms reset pulse duration).
>  Another Cirrus marvel.
>  
>  -- 
>  
>    
> 
>               
> ---------------------------------
> Feel free to call! Free PC-to-PC calls. Low rates on PC-to-Phone.  Get 
Yahoo! Messenger with Voice


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