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[ts-7000] Re: TS-7300 fpga code

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Subject: [ts-7000] Re: TS-7300 fpga code
From: "jwsincla99999" <>
Date: Sat, 04 Oct 2008 22:06:24 -0000
Hi Dave,

> I haven't heard of that protocol before ... Google gave
> me this:
> 
> http://www.hytec-electronics.co.uk/912.html
> 
> so its an RS-422 serial protocol.

Signal levels are equivalent to 422.

> Yikes, what uses 25 million volts? Are you playing
> with lightening? :)

It's a 25MV tandem accelerator, so yes, kind of.

I'm comfortable with the cross-development environment. I've used
VxWorks with 68000, PPC, & intel and RTEMS with PPC and intel.
These were all modified gnu toolchains so the linux stuff feels familiar.

> What have you done regarding FPGA development so far?

Nothing.

> Are you programming in Verilog or VHDL?

I started acquainting myself with VHDL but will probably work with the
TS code which is verilog.

> Have you tried to use Modelsim to simulate your project?

Not yet. I downloaded it but have not worked with it yet. My plan is
to wade through the 8 hr video from altera. Don't know if they discuss
Modelsim in this or not.

One question I have asked myself is how to feed and display Modelsim
data pertaining to just my piece of the design but maybe this is
straightforward.

> Do you have a reference document containing the requirements
> of the serial protocol? Its pretty simple to code up custom
> serial protocols ...

Not yet. The spec is open and I have glanced at it briefly but I need
to nail down the details. Briefly, the master maintains a constantly
circulating token. The master makes requests by inserting a message
along with the token and slaves must respond (or at least send a NACK
if the request is not reasonable) within some time window. Slaves may
also send unsolicited event-related messages if they are so
configured. Seems like a fairly simple protocol. I will be
implementing a single bit rate, 2.5Mb/s.

> Check out the serial protocol for the 1GHz digitizer and
> 1GHz DDS/PLLs on this board:
> 
> http://www.ovro.caltech.edu/~dwh/carma_board/
> p45:
> http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf
> p30:
> http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf

I'll take a look. Thanks for all the input. I'll update the status of
the project periodically.

John



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