Hi John,
> I currently am working with an old system that scans
> about 10,000 I/O points using CAMAC serial highway.
I haven't heard of that protocol before ... Google gave
me this:
http://www.hytec-electronics.co.uk/912.html
so its an RS-422 serial protocol.
> I'm stuck with this I/O architecture at the moment because
> the signal crosses 25 million volts at six different
> locations
Yikes, what uses 25 million volts? Are you playing
with lightening? :)
> I am currently driving everything from a VMEbus interface
> using only programmed I/O.
Ok, so whatever your I/O readback requirements are,
they can be met with programmed I/O. Does this I/O
involve using a UART to communicate with the RS-422
serial interface, or is it bit-banged?
> The idea, is to build a compatible synchronous serial
> engine in the fpga and divide the system into six pieces,
> each driven by it's own TS-7300.
Seems reasonable enough.
What you need to figure out is how much new stuff you want
to bite-off in one chunk:
1) New processor;
- x86 development versus ARM development
- mainline kernel support of your SBC, or at least the
processor on the SBC
2) Coupling of the processor plus custom I/O you require;
a) TS-7300 with FPGA
b) SBC plus PC104 board containing an FPGA
c) SBC plus a serial/SPI/I2C connection to an FPGA
For the case of my colleague, it was easier for him not to
deal with understanding the ARM architecture, ARM Linux,
and ARM device drivers. He used a TS x86 board, something
in the 5xxx series, and then used DIOs to communicate
with a small FPGA board. His software could control the
DIOs from user-space, so there was no driver knowledge
required.
I'm not sure what FPGA board he used, perhaps it was
something from Sparkfun:
http://www.sparkfun.com/
Note: I'm not recommending you go this route, just putting
out a list of stuff you'll need to consider.
> I wouldn't mind gutting the current fpga, except for the wishbone
> component, since I can get by without the extra H/W. Its not clear if
> I could do that without causing problems however. The code is less
> modular than it might be.
You can tear everything out, its no problem. You'll just need
to make sure that the drivers used by the default configuration
are removed. But since you've loaded the opencores design,
you would have had to do something like that already.
> TS recommended this board to me. They never mentioned an x86 one that
> included the capability of enhanced (I suppose for a price) support.
I recommended the x86 board to my colleague not due
to any difference in TS's support for the product,
but due to the fact that he'd have to do nothing to
use it relative to his x86 desktop. He could copy
applications built with his x86 compiler etc, no
need to understand cross-compilers, kernel building
etc.
> In your opinion, is the x86 option a better development platform for
> my project?
I use PowerPCs, ARMs, x86s, so don't really care what
processor I use. I use the one for the job. If you've
got a similar attitude, then you're all set. If you've
never used embedded processors before, then you may want
to choose your battles more wisely. For example, if
you're a newbie to FPGAs, that battle may be big enough
for you ;)
> I'm newbie when it comes to fpga development so any suggestions,
> pointers, recommended readings, etc. will be greatly appreciated.
What have you done regarding FPGA development so far?
Are you programming in Verilog or VHDL?
Have you tried to use Modelsim to simulate your project?
Do you have a reference document containing the requirements
of the serial protocol? Its pretty simple to code up custom
serial protocols ...
Check out the serial protocol for the 1GHz digitizer and
1GHz DDS/PLLs on this board:
http://www.ovro.caltech.edu/~dwh/carma_board/
p45:
http://www.ovro.caltech.edu/~dwh/carma_board/ad9956_tests.pdf
p30:
http://www.ovro.caltech.edu/~dwh/carma_board/at84ad001b_tests.pdf
Cheers,
Dave
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