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Re: [ts-7000] Re: TS-7300 fpga code

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Subject: Re: [ts-7000] Re: TS-7300 fpga code
From: "Peter Elliot" <>
Date: Sat, 4 Oct 2008 20:06:19 -0400
Hi John,

If you've not settled on the FPGA approach - especially as you're new to FPGAs - have you seen the XMOS XS-1 chip (www.xmos.com) which is basically a software (C & C derivative) programmed multi-threaded and core CPU. It's fast enough (1600MIPS over four cores) to do MBaud serial comms in software. They sell it as 'Software Defined Silicon', and it's designed by the same person who came up with the Inmos Transputer in the 80's.

I'm looking to use this device (they have a nice $99 dev board which can be built into my end product) as an add-on to a TS-TPC-7390 as a real-time sampling sub-system, and then communicate via either Ethernet (which the XS-1 and drive from software cvia a PHY chip) or some other method with the main CPU depending on throughput requirements.

This method may remove some of the time critical sections from the TS-7xx0 code and allow for a simpler development.

Regards,

PJE




On Sat, Oct 4, 2008 at 3:28 PM, jwsincla99999 <> wrote:

Dave,

Thanks for the reply. Using a 2.6 kernel would be a great idea. I have
written drivers for 2.4 and 2.6 and actually, this project might get
by without interrupts and just require the /dev/mem mmap interface.
Not yet sure.

I am always interested in alternatives, but I am attempting to do this
on the cheap first. I currently am working with an old system that
scans about 10,000 I/O points using CAMAC serial highway. I'm stuck
with this I/O architecture at the moment because the signal crosses 25
million volts at six different locations and the price of open-air
ethernet is too high for now. The current system doesn't use LAMs and
I am currently driving everything from a VMEbus interface using only
programmed I/O.

The idea, is to build a compatible synchronous serial engine in the
fpga and divide the system into six pieces, each driven by it's own
TS-7300.

I wouldn't mind gutting the current fpga, except for the wishbone
component, since I can get by without the extra H/W. Its not clear if
I could do that without causing problems however. The code is less
modular than it might be.

TS recommended this board to me. They never mentioned an x86 one that
included the capability of enhanced (I suppose for a price) support.
In your opinion, is the x86 option a better development platform for
my project?

I'm newbie when it comes to fpga development so any suggestions,
pointers, recommended readings, etc. will be greatly appreciated.

John




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