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[ts-7000] Re: TS-7300 fpga code

To:
Subject: [ts-7000] Re: TS-7300 fpga code
From: "jwsincla99999" <>
Date: Sat, 04 Oct 2008 16:26:39 -0000
Success, finally.

The following procedure was used to get the open core bitstream
working on the TS-7300.

One comment before proceeding. It seems that Technologic Systems is
not the least bit interested in this. I initially purchased a TS-7800
after begin led to believe that this same kind of thing would be
possible, i.e., being able to alter the fpga code for custom use.
Recently (8/08), tech support indicated that do such a thing was still
on their todo list, but near the bottom of a list that was continually
growing larger. At the same time, this individual reported that the
TS-7300 already supported this objective and that a GPL project had
been published on the open cores website. All this is indeed true but
because of the apparent lack of activity in this group (are there
other, similar groups that have made use of this feature?) and the
complete absence of interest by Technologic Systems in providing any
kind of assistance to their customers, I am wondering if there are
problems with this board or the fpga implementations. Does anyone have
any information in this regard?

Procedure:

Boot the TS-7300 in "fast-boot" mode. Connect to the system with a
terminal emulator (I guess telnet may also be used but I haven't
pursued this option; in "full-boot" mode I use ssh).

At this point, you will be modifying two shell scripts. Make copies of
the files you modify for all the obvious reasons. I also made a oopy
of the entire sd card (using the linux dd command).

After you make any changes in "fast-boot" mode. Type the "save"
command to save the contents of the ram disk to flash.

Here's a summary of the changes.

During development, the line containing "startfpga" in the file
linuxrc located in the root directory (/) will be commented. You will
boot the system, use the load_ts7300 command to load your custom
bitstream and then manually issue the "startfpga" command. This
command is another script located in /bin which will also be modified.

After deployment you may want to issue the "startfpga" command from
the /linuxrc script by removing the comment character.

The startfpga script will be modified by commenting all lines that
install or configure drivers that are associated the fpga-implemented
devices (2nd eth port, 2nd sd card, fpga serial ports, video).
Depending on how you modify the fpga, you may ultimately removed these
comments except for those associated with the video. For development,
all will be commented so the fpga may be loaded and reloaded
repeatably with your development bitstream. Note that I have assumed
the bitstream under development to be named ts7300_top.rbf and to
reside in /mnt/root/root.

Modifications to /linuxrc:

-----------------------------------------

CHANGE THE LINES THAT READ:

if [ "$model" = "3" ]; then                     #TS-7300

        startfpga "$@" &

        if jp 2; then

TO

if [ "$model" = "3" ]; then                     #TS-7300

#       startfpga "$@" &

        if jp 2; then

NOTE THAT ONLY ONE LINE HAS CHANGED.

-----------------------------------------

Modifications to /bin/startfpga:

-----------------------------------------

CHANGE THE LINES THAT READ:

load7300 /mnt/root/boot/ts7300_cyclone2.rbf
insmod /fbgen.o >/dev/null 2>&1
insmod /fbcon-cfb16.o >/dev/null 2>&1
insmod /ts7300fb.o >/dev/null 2>&1

(
echo
echo
echo
echo
echo
echo
echo "^[[01;34m>> ^[[01;37mTS-LNX-INITRD, Rev 1.04 - TS-7300 FPGA board"
echo "^[[01;34m>> ^[[01;37mCopyright (C) 2006, Technologic Systems^[[00m"
echo
) > /dev/vc/0
gunzip -c /splash.gz > /dev/fb/0 &

(
  insmod pcipool
  insmod usbcore
  insmod usb-ohci
  insmod usb-ohci-ep93xx
  insmod input
  insmod hid
  insmod keybdev
  insmod tsuart0
  insmod tsuart-73
  insmod /sdcard.o -o sdcard1 io=0x72000020 name="sdcard1"
  insmod open_eth
) >/dev/null 2>&1 &
                                                                         
if jp 6; then
  export ENV=/vid-shinit
  sh -i </dev/vc/0 >/dev/vc/0 2>&1
  rm /vidsh.pid >/dev/null 2>&1
  if [ -e /serialsh.pid ]; then
    >/serialsh-aborted
    kill -1 `cat /serialsh.pid` >/dev/null 2>&1
  else
    >/serialsh-userexited
  fi
fi

wait

TO

#load7300 /mnt/root/boot/ts7300_cyclone2.rbf
load7300 /mnt/root/root/ts7300_top.rbf
#insmod /fbgen.o >/dev/null 2>&1
#insmod /fbcon-cfb16.o >/dev/null 2>&1
#insmod /ts7300fb.o >/dev/null 2>&1

(
echo
echo
echo
echo
echo
echo
echo ">> TS-LNX-INITRD, Rev 1.04 - TS-7300 FPGA board"
echo ">> Copyright (C) 2006, Technologic Systems"
echo
)
#gunzip -c /splash.gz > /dev/fb/0 &

(
  insmod pcipool
  insmod usbcore
  insmod usb-ohci
  insmod usb-ohci-ep93xx
  insmod input
  insmod hid
  insmod keybdev
  insmod tsuart0
# insmod tsuart-73
# insmod /sdcard.o -o sdcard1 io=0x72000020 name="sdcard1"
# insmod open_eth
)

#if jp 6; then
#  export ENV=/vid-shinit
#  sh -i </dev/vc/0 >/dev/vc/0 2>&1
#  rm /vidsh.pid >/dev/null 2>&1
#  if [ -e /serialsh.pid ]; then
#    >/serialsh-aborted
#    kill -1 `cat /serialsh.pid` >/dev/null 2>&1
#  else 
#    >/serialsh-userexited
#  fi 
#fi 

wait

-----------------------------------------

Remember to type the "save" command to save the contents of the ram
disk to flash.

After a "fast-boot" you will run this script as follows:

startfpga "$@" &

After a "full-boot", I usually reload the fpga as

cd /root
load_ts7300 -v ts7300_top.rbf

-----------------------------------------

I built the fpga bitstream as follows:

1) Download all files from
http://www.opencores.org/cvsweb.shtml/ts7300_opencore/ (Note that you
must create an account and have your information verified before you
may download)

These files are divided into two parts: the ethernet core and
everything else. Everything else is put in the folder of your choice
and a sub-directory named "ethernet" is create for the ethernet files.

2) Register with altera and download the free fpga tools (or buy the
subscription).

3) Run the altera tools (Quartus II - note that I have been using
Version 8.0) and open a project which will be given by the .pdf file
in the directory from step 1. From the menu bar, choose "Assignments"
--> "Device" and open the device settings window. Click on the button
labeled "Device and Pin Options..." which opens another window. Now,
select the "Unused Pins" tab and set the value of "Reserve all unused
pins" to "As input tri-stated" (Note that Dave Hawkins made this fine
suggestion. I inquired of TS about this and the original developer
said he couldn't remember what he submitted to the open-core website
but that this setting seemed the most reasonable).

4) Compile the project. If all goes well, the project directory will
contain the file named "ts7300_top.rbf". This file is then copied to
the TS-7300 and is the file which will be loaded by load_ts7300.

Note that at this point, the fpga is not particularly useful. This is
the point at which you read the Wishbone bus spec (on the open core
website) and begin your custom development. However, to verify that
you have actually loaded the new bitstream, you may write to physical
address 0x72a00000 which corresponds to pins 9 and above of the 40 pin
dio1/dio2 header.

Hope this is helpful to someone.

John Sinclair

--- In  David Hawkins <> wrote:
>
> Hi John,
> 
> > Thanks for the info. I will look at the pins you referenced in
> > more detail.
> > 
> > I have made some progress. Apparently, I did not have all the
> > project settings on the first go.
> 
> What you did sounds about right.
> 
> If you look in the .qpf file, you should see that its a
> text file, and contains statements something like:
> 
> set_global_assignment -name FAMILY CYCLONE
> set_global_assignment -name DEVICE EP1C12Q240C8
> set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT
TRI-STATED"
> 
> (this is from a Tcl file for a different board, so your
> family/device lines will be different).
> 
> The .qpf file is essentially a Tcl file used to configure
> the quartus tool.
> 
> > Everything works with the shipped fpga core. My question only
> > concerns functionality related to loading the open fpga
> > core rebuilt from sources.
> 
> I never played with the opencores design, so sorry,
> can't help there.
> 
> Cheers,
> Dave
>



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