Hi Blair,
Sounds like you've got it working exactly as it should be.
--- In "Blair" <> wrote:
[...]
> 4) What I'm seeing is that you have to poke to the SSP Data register in order
> for the Cirrus processor to generate any SPI Clock pulses. So when you send
> the configuration word to the MCP320x chip, you get one clock oscillation for
> every bit. In this case, I configured the SPI interface for 12 bit operation
> so I get 12 clock pulses. When I want to read out the 12-bit ADC sample
> value, I have to poke 0x00 first in order to generate the 12 clock pulses
> needed to get the MCP320x chip to send the 12-bit word.
>
That's normal SPI behavior, which is always send and receive simultaneously.
The peripheral on the Cirrus waits for outgoing data, clocks that out and reads
incoming data. Then the clock stops again.
> 5) Timing is a little funky for this chip and the Cirrus chip combination so
> I right-justify the configuration word and then shift it left one bit so that
> I don't lose bit-11 of the returned value. There is also seems to be some
> delay between the time the return value is completely clocked out of the chip
> and the time it's actually available in the SSP Data register to read. So I
> need to read the register, wait for the buffer to be not empty again and then
> read the real value. Having a logic analyzer (I used a Bitscope DSO) made
> all the difference in getting this to work.
>
Hmm, the MCP320x data sheet shows this for 8bit transfer but it suggests you
need to shift one more bit since there's an empty cycle and a "null bit" before
bit 11 gets sent out.
The timing sounds right, for 12 bit you'll need two cycles, one for the command
to go out and one for the data to come back in. So you'd need to wait for the
buffer-not-empty twice.
Andrew
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