Okay, let me clarify a few things.
1) I'm talking to the SPI interface via /dev/mem. Seems to work perfectly fine
for what I need.
2) The Microchip MCP320x series is a 12-bit ADC.
3) You peek and poke the SSP Data register to read and write to SPI devices.
This is all Cirrus Logic stuff and has nothing to do with the 7350.
4) What I'm seeing is that you have to poke to the SSP Data register in order
for the Cirrus processor to generate any SPI Clock pulses. So when you send
the configuration word to the MCP320x chip, you get one clock oscillation for
every bit. In this case, I configured the SPI interface for 12 bit operation
so I get 12 clock pulses. When I want to read out the 12-bit ADC sample value,
I have to poke 0x00 first in order to generate the 12 clock pulses needed to
get the MCP320x chip to send the 12-bit word.
5) Timing is a little funky for this chip and the Cirrus chip combination so I
right-justify the configuration word and then shift it left one bit so that I
don't lose bit-11 of the returned value. There is also seems to be some delay
between the time the return value is completely clocked out of the chip and the
time it's actually available in the SSP Data register to read. So I need to
read the register, wait for the buffer to be not empty again and then read the
real value. Having a logic analyzer (I used a Bitscope DSO) made all the
difference in getting this to work.
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