--- In David Hawkins <> wrote:
>
>
> Hi,
>
> > Digging more on Altera's website, I found the following information.
> > Assuming I only use Nios II MegaCore, I am allowed to:
> > - Generate SRAM Object File (.sof) and program it to the device via
> > Quartus II Web Edition and Altera download cable
> > - In thethered mode with a cable, the use is unlimited
> > - In non-tethered mode, the design will stop functioning after some
> > time (they say 1 hour or more).
> > - After the time-out, the device can be re-programmed to continue
> > evaluation
> > - To control time limitation, in tethered mode Quartus Programmer
> > sends signals to the embedded time limiting logic on FPGA resetting
> > the time.
> > Reference: http://www.altera.com/literature/an/an320.pdf
> >
> > I wonder if I can use non-Altera cable to program the device and
> > evaluate 1 hour at a time in non-tethered mode. This way I can avoid
> > buying the specific cable and using a simple JTAG programmer.
>
> If you have a parallel port on your development machine,
> you can make up their parallel port adapter very easily,
> and just use that.
Dave, Thanks for all the answers!
No parallel port, but you are right.
>
> You can get a USB download cable from Terasic for $50
>
>
http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=53
>
> eBay sometimes has cheap USB cables too.
Thanks for the link
>
> > I haven't tried Altera flow yet, but I think generating .SOF file does
> > not require the cable. I hope downloading it to FPGA can be also be
> > done with a generic JTAG. What do you think?
>
> You can generate the .SOF programming file used by JTAG, or
> generate the raw binary file (.RBF) that I think the TS tool
> uses. That way you can use TS Linux to reconfigure the FPGA,
> and you can just live with the time limit, eg. reset and
> reload the configuration every hour :)
It looks like Altera's OpenCore license only allows generating .sof
programming files. Here is a snippet from p3 of
(http://www.altera.com/literature/an/an320.pdf):
"If all the megafunctions in your design that are not fully licensed
support OpenCore Plus hardware evaluation, the Quartus II
software allows you to generate a special programming file, an
SRAM Object File (<top-level project>_time_limited.sof), that
you can use to program a device with the Quartus II
Programmer and an Altera download cable. However, you
cannot use it to program memory. No .vqm, or atom-level .vo, or
.vho files are generated."
Also, looking at TS-7300's documentation again, they only mention CPLD
programming via JTAG, which means NIOS II with OpenCore licence is not
an option for this board. Unless I am mistaken?
>
> > LEON
> > There are many positive things about Leon3 including a large user
> > community, asic- and fpga- proven design, etc. It also supports eCos
> > with drivers for OpenCore 10/100 Mbit Ethernet, which is very
attractive.
> >
> > Is the design flow fairly easy to ramp up on with some
> > tutorials/experience reports?
>
> I haven't played with it much. I just noticed the Altera application
> examples and downloaded a copy. I have seen software development
> activity on a number of groups, so it is popular.
>
> > I will be doing a project that mostly
> > should concentrate on RTOS development and not on hardware debugging.
>
> So why bother with the NIOS processor at all? You have an ARM
> processor sitting there just begging for a UCOS port, eg. here's
> the one I did for the ARM LPCs:
>
> http://www.ovro.caltech.edu/~dwh/ucos/
> http://www.ovro.caltech.edu/~dwh/ucos/project_AR1803.pdf
> http://www.ovro.caltech.edu/~dwh/ucos/gcc_and_ucosii.zip
>
> The EP9302 would be similar. You could even use the serial
> bootloader interface to boot UCOS on the board without
> having to overwrite the Flash or SD-card.
Nios was one of the original options due to several reasons:
- For another project that I will be mainly using TS-7300 for, I would
need to use FPGA for I/O peripheral development.
- As part of this RTOS project, I also need peripherals (at least
interrupt controller and some I/O)
- Since I have experience with uBlaze, I think adding NIOS would be
fairly easy
- NIOS II has a well documented port of uC/OS II, which is supposed to
save time
My other option is using a microcontroller like Motorola HSC12, which
would be way simpler than FPGA since it would involve only software.
However, I would have to do two things at the same time (work with
Cyclone 2 for one project and HSC12 for another in parallel). Also, I
own TS-7300 and not Motorola board yet.
Now, you brought up an interesting option. A port of uC/OS to EP9302.
I've never done this before. Sounds complex, yet not too bad. From
your report:
"A μCOS-II port requires the definition of the data types on the
processor, assembly language routines for critical section protection,
interrupt handling, and context switching, and the
definition of C coded hook functions."
I would have to consider a few things before deciding because I have a
lot of time constraints at the moment.
>
> > Nios II looks very attractive due to the tools it is provided with. I
> > assume it should be similar to MicroBlaze flow which will speed things
> > up for me. It would be nice to go open source with Leon, but if it
> > will take a significantly larger amount of time, I should probably
> > better leave it for future and just get the Altera's download cable
> > for this project. Any comments?
>
> I guess my first comment would be what is the end goal for the project?
> Why did you get a TS-7300 for this project?
TS-7300 is available from another project. It just happens that it's
available and I can combine two different things on one platform/FPGA.
>
> For example, if you're familiar with the Microblaze flow, why not
> use a board with a Xilinx FPGA? The Avnet Spartan-3A kit is $50
> and comes with download software for bitfiles, but perhaps doesn't
> have the resources you require.
I also have Xilinx Virtex II and Spartan 3 boards. I've seen uC/OS II
ports to uBlaze, but have to check whether there is a risk of spending
too much time porting it to newest version of uBlaze (if the existing
ports are for older versions). Again, the time is quite crucial here.
I'll look into porting to EP9302 and prices for HSC12 devboards.
Thanks!
>
> Cheers,
> Dave
>
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