I was wanting to a similar(ish) thing but writing out the I/O pins
instead.
My thought was to create a driver attached to the 2nd timer of the cpu
and run the writing of the I/O in kernel land each time the timer
interrupt occurs.
Looking a little closer at kernel code and the meager marvell CPU docs
I could find, it appears that both timer 1 & 2 share the same
interrupt (timer 1 being used for the system clock)
Anyone know otherwise?
I could add a shared interrupt I guess, if I made changes to the timer
to allow interrupt sharing, but I dont know if thats such a good idea :)
--- In "fulatoro" <> wrote:
>
> Well, you might have a point, however, I am reading IO pins and I
> would like to have better granularity than the 10ms System clock, I
> realize that I can probably improve things by writing a device driver
> and doing the work in the kernel, but the complexity is not justified.
> My system is doing basic IO work and provides a web interface for
> setup and configuration and that is about it. It should not be too
> taxing.
>
> Maybe someone else can share their experience on this.
>
> Moussa
>
> --- In Fotis Loukos <fotisl@> wrote:
> >
> > fulatoro wrote:
> > > Hello, I was attempting to change the HZ setting and recompile the
> > > kernel but, I was unable to find the option when doing a make
xconfig.
> > > I did attempt to modify the .config file manually to set the HZ to
> > > 1000, but it seems to default back to 100. Any suggestions on
how to
> > > do this right?
> > >
> > > Moussa
> > >
> > >
> > Hello,
> > you can change the HZ value at linux/include/asm-arm/param.h. But are
> > you sure you want to do this? 1000 interrupts per second just for the
> > timer may be too much. At least for the user applications...
> >
> > Fotis
> >
>
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