> Things like the two SD Card cores and the NAND Flash controller are
> implemented in the FPGA. With the TS default load, about 40-50% of the
> FPGA will be available for user logic.
>
> New information about the FPGA - we will probably make things easier
> for the users to add their hardware to the FPGA and still keep TS
> default cores, since this is a main issue we have with the TS-7300. We
> are talking about making our TS-7800 FPGA code open-source - however,
> keep in mind this is NOT an official decision. At least, TS core
> binaries for the Lattice FPGA dev tools will be provided, allowing
> user's bitstreams to keep TS default logic.
Given the 12k LUT reference, is this populated with a Lattice ECP2-12?
Thank you,
Joel Winarske
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