If this is useful for anyone else, I ran a test on the watchdog where
it would set the watchdog on bootup and *not* stroke it, which would
immediately reboot. I let this run for a little over 13 hours,
rebooting continuously, and I had 3929 successful watchdog resets
without any lockups. This would to me seem to indicate that Cirrius
Logic has probably fixed their watchdog problem.
Obviously I can't guarantee that all platforms will be as reliable as
mine is! My CPU info is:
EP9302-CQ
EFWAE0BH0445
126502
--Andy Gryc
Jesse Off wrote:
On Wed, 23 Mar 2005, andygryc wrote:
The manual has the following cryptic comment: "Do not attempt to use
the Watchdog Timer in the EP9302".
Now, I *am* using it, and it does not appear to have any ill effects
when the watchdog resets. If I was to read into the comment, I'm
guessing that the watchdog reset only resets the CPU and won't reset
the PLD. However, since I don't appear to see any problems in doing
this, I was wondering if someone could explain in just a tiny bit
more detail what the consequences might be.
Early versions of the EP93xx silicon had issue with the watchdog on the
chip. What we had found in early prototyping/testing is that about 1 out
of 20-30 resets using the watchdog would lock up the processor instead of
reseting it. When we queried our contacts at Cirrus Logic they said "dont
use the watchdog", so we implemented the CPLD watchdog. About 2 months
later, they released the errata described at
http://www.cirrus.com/en/pubs/appNote/AN258REV2.pdf
Recent versions of silicon may (or may not) have issue with the watchdog,
but YMMV. We would be able to implement the features you would require on
the watchdog fairly easily, but unfortuntely we do not have even one spare
bit available on the CPLD.
//Jesse Off
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