Still crackling away, and still can't get the interrupt to trigger on edge,
though. It is bit2 of PORT F, right?
This macro: appears to add 16 to accomplish and ENDIAN sawp. Is that teh
intent?
#define EP93XX_GPIO_LINE_F(x) ((x) + 16)
So no joy in these:
gpio_direction_input(EP93XX_GPIO_LINE_F(3));
comX->irq = gpio_to_irq(EP93XX_GPIO_LINE_F(3)); // 83
set_irq_type(IRQ_EP93XX_EXT3, IRQ_TYPE_EDGE_RISING);
as calling the macro with "3" seems all wrong. To me it seems that I need to
be at:
gpio_ptr = ioremap(TS7260_GPIO_BASE, TS7260_GPIO_SIZE);
irqMask = 0x04;
#define GPIOFDir (gpio_ptr + 0x34)
#define GPIOFIntType1 (gpio_ptr + 0x4C)
#define GPIOFIntType2 (gpio_ptr + 0x50)
writeb (readb (GPIOFDir) & ~irqMask, GPIOFDir); /* Input */
writeb (readb (GPIOFIntType1) | irqMask, GPIOFIntType1); /* Int on edge */
writeb (readb (GPIOFIntType2) & ~irqMask, GPIOFIntType2); /* Rising edge */
Do I have it wrong?
won't irqMask = 0x01, 0xc02, & 0x04 address all three external interrupts?
Sorry to be so dense. How does my IRQ 40 relate to the 8X IRQs from here?
comX->irq = gpio_to_irq(EP93XX_GPIO_LINE_F(3)); // 83
THANKS A LOT!!!
(Man this parallel port code is like looking down a hall of PC history)
--- In Clark Dunson <> wrote:
>
> Thanks Kevin, we were hoping it was something like that.
> I presume I'll find all of this worked out in 8250_ts_ser1.c
> and family? I'll research the gpio stuff from Matthieu.
>
> We decided yesterday to create a new module, "ts_ser2" that
> the parport_pc module depends on. In this way, the interface
> to parport_pc in kernel and user land remains the same. This
> new module, will also handle the TS-SER2 serial ports, and
> optionally create /dev/lp0. My CTO wants to order a whole bunch
> of these TS-7260 systems very soon, but he won't unless we can
> demonstrate the ADC on the parallel port.
>
> Thanks again -
>
> On Jan 25, 2011, at 6:37 PM, Kevin Cozens wrote:
>
> > Clark wrote:
> > > We have 2.6.29-ts, and notice that the IRQ counts in /proc/
> > interrupt go
> > > absolutely wild when we attempt to insert a 0.2 second, TTL/CMOS
> > level
> > > signal onto pin A21 of the PC104 connector of the TS-7260.
> > >
> > > When the square wave voltage goes high, the system load goes up
> > so much
> > > that the shell freezes until the voltage drops, at which time the
> > count
> > > in /proc/interrupts has jumped like it does each time the voltage
> > goes to
> > > 5, by about 397,000 in 0.2 seconds!!
> >
> > I don't know the 7260 but I have used interrupts in a 7250 board.
> > Based on
> > your description it sounds like you have the interrupt on the board
> > set to
> > be level sensitive where you really want it set to generate
> > interrupts on a
> > signal edge.
> >
> > On a TS-7250 the key two lines for setting up the interrupt was:
> >
> > #define GPIOFIntType1 (gpio_ptr + 0x4C)
> > #define GPIOFIntType2 (gpio_ptr + 0x50)
> >
> > writeb (readb (GPIOFIntType1) | FLOW, GPIOFIntType1); /* Int on
> > edge */
> > writeb (readb (GPIOFIntType2) & ~FLOW, GPIOFIntType2); /* Rising
> > edge */
> >
> > gpio_ptr points to the base address of the GPIO registers.
> >
>
------------------------------------
Yahoo! Groups Links
<*> To visit your group on the web, go to:
http://groups.yahoo.com/group/ts-7000/
<*> Your email settings:
Individual Email | Traditional
<*> To change settings online go to:
http://groups.yahoo.com/group/ts-7000/join
(Yahoo! ID required)
<*> To change settings via email:
<*> To unsubscribe from this group, send an email to:
<*> Your use of Yahoo! Groups is subject to:
http://docs.yahoo.com/info/terms/
|