Placing the instruction "ldr pc,[PC,#-0xFF0]" on the IRQ offset of the vector
table doesn't seem to work here.
Is this a feature of the EP93xx chips? (specifically: EP9302) If not, what mayI
be doing wron? (The table is sitting from RAM address 0)
Alternatively, if true, how can I implement a jump to the contents of the VIC1
vector register (at 0x800B0030) without using any other registers, or saving
anything on the stack?
As a related question: does anybody know of a FreeRTOS port for the 93xx (which
needs something like the above)
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