Hi Jesse,
Thank you very much for making the source for sdcore2.c available.
That will make life a lot easier.
> I'm not sure whats meant by chilling out and "coming clean"? I was
> under the impression that the days equating closed-source software to a
> life of crime have come and gone from the bulk of the open source
> community.
>
This is a (rather small) reflection of my frustration - I did ask
several times for help and for private only access to the sdcore source
code for my project. I never received the source code which you provide
below. I also spent a significant amount of time both reworking the
shim, and decompiling your sdcore.
My project was held up as a consequence.
I'm happy to accept that there was a miscommunication - perhaps I should
have called you directly.
> Is this the code you're looking for?
>
> ftp://ftp.embeddedarm.com/misc/sdcore2.c
>
YES!
What this means is that I can contribute a forward patch from my 2.6.27
- which greatly simplifies linux use on your boards - here is why:
My build boots directly to a / partition using ext2 - no pissing around
with initrds and other pre-load file system crap. It also means that
the nand flash need never be touched; as JFFS2 / YAFFS2, etc all have
forward compatibility issues that make using the fastboot with the
boards difficult.
> I hope you're right regarding the recent SD association public release
> of the spec. We'll continue to keep the Verilog closed source though at
> least for a couple more years. We'll likely release a binary netlist
> of that soon for the TS-7500 FPGA reimplementations though.
>
I will need to get the PDFs for you at a later date - however, I
obtained them using google. They're on another computer, and - yes I am
correct in this because I used the docs to guess what your binary was
doing. The only part I did not re-implement was the sdcard locking -
which is also documented.
-bms
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