[ts-7000] Opencore/usercore bug with headerpin inputs?

["jpeshkin" <>]

I'm a Verilog newbie, but it seems that a usercore cannot use a
headerpin (the DIO2 header) as an input without correcting a bug in
ts7300_top.

All my attempts to use pint as inputs failed (always read a zero)
until I moved the dio0to8_pad = 9'bzzzzzzzzz statement to a point
after the headerpin_i had copied the input value.

Am I correct that there is a problem here?




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