Hi,
> thanks alot, it really helped.
Glad to hear.
>>> I am a student in Georgia Tech. I recently bought a TS7300 board and I
>>> need to implement a high speed data acquisition machine within the
>>> FPGA. I think the best way is to use the Block Memory within the FPGA
>>> and implement a Single Port Single Clock because I need to accumulate
>>> about 1.5kb of data at one time.
>>>
>>> I could not do it using logic cells as memory array because this uses
>>> more than the available logic elements. My problem is I do not know
>>> how to declare the block memory. I have looked at the Altera
>>> documentations on Block Memory and I pretty much how to manipulate the
>>> signals (byteena, wren, datain, dataout, clock, addresstall, address,
>>> enable and such) to implement it but I still dont know how to declare
>>> it yet.
Why don't you explain to me what you are planning on
doing, and I'll provide you with some feedback.
I also work on 'high-speed data acquisition machines'.
http://www.ovro.caltech.edu/~dwh/correlator/
http://www.ovro.caltech.edu/~dwh/carma_board/
Cheers,
Dave
------------------------------------
Yahoo! Groups Links
<*> To visit your group on the web, go to:
http://groups.yahoo.com/group/ts-7000/
<*> Your email settings:
Individual Email | Traditional
<*> To change settings online go to:
http://groups.yahoo.com/group/ts-7000/join
(Yahoo! ID required)
<*> To change settings via email:
<*> To unsubscribe from this group, send an email to:
<*> Your use of Yahoo! Groups is subject to:
http://docs.yahoo.com/info/terms/
|