Hi,
I am a student in Georgia Tech. I recently bought a TS7300 board and I
need to implement a high speed data acquisition machine within the
FPGA. I think the best way is to use the Block Memory within the FPGA
and implement a Single Port Single Clock because I need to accumulate
about 1.5kb of data at one time.
I could not do it using logic cells as memory array because this uses
more than the available logic elements. My problem is I do not know
how to declare the block memory. I have looked at the Altera
documentations on Block Memory and I pretty much how to manipulate the
signals (byteena, wren, datain, dataout, clock, addresstall, address,
enable and such) to implement it but I still dont know how to declare
it yet.
If anyone can help me with this, it would be great. Also, if you have
any other suggestion, i am open for ideas. Thank you.
--Mugilan
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