Hi Jason,
> I am trying to compile the FPGA code for the TS-7300 that is provided on
> the opencores.org website. I am receiving the following errors (see
> attached log file). The files that I am compiling together are:
> From the error messages –it seems as though there are a couple of
> models missing. When probing pll.v –function altpll_component is calling
> function altpll; which can’t be found. This seems to be the case for the
> other error messages.
>
> I need this to compile before I compile in other things such as I2C
> core, ect.
It looks like the opencores stuff was generated with Quartus 6.0.
Your log file looks like you're using a Cadence tool to build
the design.
Any reason you can't just use Quartus II web edition directly?
(7.2sp2 is the latest, it should work fine).
If you have to use your Cadence tool, then you'll have to tell
it to treat the components as a black-box, and pass the EDIF
into Quartus II for synthesis ... so may as well just compile
the verilog in Quartus.
Note; I haven't built the opencores project ... just commenting
on your request for help :)
Cheers,
Dave
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