> Hi Captain !
>
> You need a few patches for modern 2.6 kernels.
>
> http://tech.groups.yahoo.com/group/ts-7000/message/5497 is a good
> place to start.
>
> Also, I don't believe CF is working yet with 2.6. See the thread
> starting at http://tech.groups.yahoo.com/group/ts-7000/message/5672
>
> HTH ......... Charlie
>
> PS - I found development much easier using NFS root.
Okay, using the above I came up with this patch but I had no luck to
get it to boot. Is the patch I put together wrong?
diff -urN linux-2.6.20/arch/arm/boot/compressed/head.S
arm-linux-2.6.20/arch/ar
m/boot/compressed/head.S
--- linux-2.6.20/arch/arm/boot/compressed/head.S 2007-02-04
13:44:54.000
000000 -0500
+++ arm-linux-2.6.20/arch/arm/boot/compressed/head.S 2007-03-16
15:48:13.000
000000 -0400
@@ -838,3 +838,36 @@
.align
.section ".stack", "w"
user_stack: .space 4096
+
+ .section ".start", "ax"
+
+#ifdef CONFIG_ARCH_ENP2611
+ mov r7, #(356 & 0xff00)
+ orr r7, r7, #(356 & 0x00ff)
+#endif
+
+#ifdef CONFIG_MACH_TS72XX
+ mov r7, #(673 & 0xff00)
+ orr r7, r7, #(673 & 0x00ff)
+#endif
+
+#ifdef CONFIG_MACH_LOGICPD_PXA270
+ mov r7, #(930 & 0xff00)
+ orr r7, r7, #(930 & 0x00ff)
+#endif
+
+#ifdef CONFIG_MACH_ESPRESSO
+ mov r7, #(949 & 0xff00)
+ orr r7, r7, #(949 & 0x00ff)
+#endif
+
+#ifdef CONFIG_MACH_ONEARM
+ mov r7, #(1075 & 0xff00)
+ orr r7, r7, #(1075 & 0x00ff)
+#endif
+
+#ifdef CONFIG_MACH_N2100
+ mov r7, #(1101 & 0xff00)
+ orr r7, r7, #(1101 & 0x00ff)
+#endif
+
diff -urN linux-2.6.20/arch/arm/mach-ep93xx/Kconfig
arm-linux-2.6.20/arch/arm/m
ach-ep93xx/Kconfig
--- linux-2.6.20/arch/arm/mach-ep93xx/Kconfig 2007-02-04
13:44:54.000000000 -
0500
+++ arm-linux-2.6.20/arch/arm/mach-ep93xx/Kconfig 2007-03-16
15:43:25.000
000000 -0400
@@ -7,6 +7,15 @@
help
Enable kernel support for MaverickCrunch.
+config CR1_NFBIT
+ bool "Turn on nF bit in ControlRegister 1"
+ help
+ Say 'Y' here to force the nF bit on. Usually this is set
+ by the bootrom. If it is not set, then the CPU core will
+ run from HCLK instead of FCLK, and performance will suffer.
+ If you see BogoMIPS of about 1/4 of your CPU clock, try
+ turning this on; your performance should double.
+
comment "EP93xx Platforms"
config MACH_ADSSPHERE
diff -urN linux-2.6.20/arch/arm/mm/proc-arm920.S
arm-linux-2.6.20/arch/arm/mm/p
roc-arm920.S
--- linux-2.6.20/arch/arm/mm/proc-arm920.S 2007-02-04
13:44:54.000000000 -
0500
+++ arm-linux-2.6.20/arch/arm/mm/proc-arm920.S 2007-03-16
15:42:09.000000000 -
0400
@@ -395,6 +395,9 @@
mrc p15, 0, r0, c1, c0 @ get control register v4
bic r0, r0, r5
orr r0, r0, r6
+#ifdef CONFIG_CR1_NFBIT
+ orr r0,r0,#0x40000000 @ set nF
+#endif
mov pc, lr
.size __arm920_setup, . - __arm920_setup
diff -urN linux-2.6.20/drivers/i2c/busses/i2c-iop3xx.c
arm-linux-2.6.20/drivers
/i2c/busses/i2c-iop3xx.c
--- linux-2.6.20/drivers/i2c/busses/i2c-iop3xx.c 2007-02-04
13:44:54.000
000000 -0500
+++ arm-linux-2.6.20/drivers/i2c/busses/i2c-iop3xx.c 2007-03-16
15:50:02.000
000000 -0400
@@ -508,6 +508,7 @@
platform_set_drvdata(pdev, new_adapter);
new_adapter->algo_data = adapter_data;
+ new_adapter->class = I2C_CLASS_ALL;
i2c_add_adapter(new_adapter);
diff -urN linux-2.6.20/drivers/mtd/nand/ts7250.c
arm-linux-2.6.20/drivers/mtd/n
and/ts7250.c
--- linux-2.6.20/drivers/mtd/nand/ts7250.c 2007-02-04
13:44:54.000000000 -
0500
+++ arm-linux-2.6.20/drivers/mtd/nand/ts7250.c 2007-03-16
15:57:29.000000000 -
0400
@@ -48,14 +48,14 @@
{
.name = "TS-BOOTROM",
.offset = 0x00000000,
- .size = 0x00004000,
+ .size = 0x00020000,
}, {
.name = "Linux",
- .offset = 0x00004000,
+ .offset = 0x00020000,
.size = 0x01d00000,
}, {
.name = "RedBoot",
- .offset = 0x01d04000,
+ .offset = 0x01d20000,
.size = 0x002fc000,
},
};
@@ -67,15 +67,15 @@
@@ -67,15 +67,15 @@
{
.name = "TS-BOOTROM",
.offset = 0x00000000,
- .size = 0x00004000,
+ .size = 0x00020000,
}, {
.name = "Linux",
- .offset = 0x00004000,
+ .offset = 0x00020000,
.size = 0x07d00000,
}, {
.name = "RedBoot",
- .offset = 0x07d04000,
- .size = 0x002fc000,
+ .offset = 0x07d20000,
+ .size = 0x002e0000,
},
};
#endif
diff -urN linux-2.6.20/drivers/rtc/rtc-rs5c372.c
arm-linux-2.6.20/drivers/rtc/r
tc-rs5c372.c
--- linux-2.6.20/drivers/rtc/rtc-rs5c372.c 2007-02-04
13:44:54.000000000 -
0500
+++ arm-linux-2.6.20/drivers/rtc/rtc-rs5c372.c 2007-03-16
15:50:23.000000000 -
0400
@@ -16,7 +16,7 @@
#define DRV_VERSION "0.4"
/* Addresses to scan */
-static unsigned short normal_i2c[] = { /* 0x32,*/ I2C_CLIENT_END };
+static unsigned short normal_i2c[] = { 0x32, I2C_CLIENT_END };
/* Insmod parameters */
I2C_CLIENT_INSMOD;
diff -urN linux-2.6.20/include/asm-arm/arch-ep93xx/uncompress.h
arm-linux-2.6.2
0/include/asm-arm/arch-ep93xx/uncompress.h
--- linux-2.6.20/include/asm-arm/arch-ep93xx/uncompress.h
2007-02-04 13:4
4:54.000000000 -0500
+++ arm-linux-2.6.20/include/asm-arm/arch-ep93xx/uncompress.h
2007-03-16 15:4
7:01.000000000 -0400
@@ -76,10 +76,55 @@
;
}
+/*
+ * Some bootloaders don't turn on the UARTBAUD bit, which means that
+ * the UARTs will be running off a divided 7.3728 MHz clock instead of
+ * the 14.7456 MHz peripheral clock when linux boots.
+ *
+ * We detect that condition here and fix it by turning on UARTBAUD, and
+ * then reprogramming the divisors on all enabled UARTs to twice what
+ * they were before we turned UARTBAUD on, to preserve the programmed
+ * baud rate.
+ */
+#define PHYS_SYSCON_CLOCK_CONTROL 0x80930004
+#define SYSCON_CLOCK_UARTBAUD 0x20000000
+#define PHYS_UART1_BASE 0x808c0000
+#define PHYS_UART2_BASE 0x808d0000
+#define PHYS_UART3_BASE 0x808e0000
+
+static void uart_divisor_times_two(unsigned int base)
+{
+ u16 divisor;
+
+ divisor = __raw_readb(base + 0x0c) << 8;
+ divisor |= __raw_readb(base + 0x10);
+ if (divisor) {
+ divisor = (2 * (divisor + 1)) - 1;
+ __raw_writeb(divisor >> 8, base + 0x0c);
+ __raw_writeb(divisor & 0xff, base + 0x10);
+ __raw_writeb(__raw_readb(base + 0x08), base + 0x08);
+ }
+}
+
+static void fix_uart_base(void)
+{
+ unsigned int v;
+
+ v = __raw_readl(PHYS_SYSCON_CLOCK_CONTROL);
+ if ((v & SYSCON_CLOCK_UARTBAUD) == 0) {
+ v |= SYSCON_CLOCK_UARTBAUD;
+ __raw_writel(v, PHYS_SYSCON_CLOCK_CONTROL);
+
+ uart_divisor_times_two(PHYS_UART1_BASE);
+ uart_divisor_times_two(PHYS_UART2_BASE);
+ uart_divisor_times_two(PHYS_UART3_BASE);
+ }
+}
static void arch_decomp_setup(void)
{
ethernet_reset();
+ fix_uart_base();
}
#define arch_decomp_wdog()
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