[ts-7000] Problem compiling FPGA code with Quartus 5.1

["aqueisser" <>]

Hi all,

I just received my TS7300 and I'm eager to start messing with the 
FPGA code. Unfortunately, I'm running into a compiler problem with 
Quartus 5.1. I haven't downloaded the Web edition of Quartus yet 
since 5.1 (and soone 6.0) is my normal environment and I'd like to 
keep working with that.

Has anyone run into this problem and maybe found a solution? The 
errors are listed below:

Error: Symbolic name "scanclk" must be port of megafunction, 
macrofunction, primitive, or state machine "pll"

(this happens in the Altera-supplied megafunction altpll.tdf)

and 

Error: Can't elaborate user 
hierarchy "pll:clkgencore|altpll:altpll_component"

(which is probably just a high-level indication of the same error)

Thanks for any insights,
Andrew Queisser










 
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