--- In "PeterElliot" <> wrote:
>
> Jesse,
>
> Thanks for posting the FPGA template, I'm no doubt going to spend
> hours trying to making a single LED flash! ;).
The template actually already demonstrates this. dummyreg[31:0]
controls the pins 9-40 on the 40-pin header next to the FPGA. pins
36 and 38 are the LEDs.
>
> Could you clarify the issues relating to the getting access to the
TS-
> cores such as VIDEO, SD, XDIO. If I wanted to make a custom FPGA
> image containing Technologic Systems non-GPL code. In my
application
> I need the Video, SD and Ethernet but would roll my own IO block.
I can't speak definitively since it comes down to a decision by
someone other than me, but likely those cores would be licensed to
interested individuals/companies for a flat fee depending on format
(source code or netlist) and level of design support required.
What we'd like to see is if the open-source hardware community might
take this FPGA and run with it now-- creating and supporting a
completely alternative bitstream superior to the one we ship by
default.
//Jesse Off
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