[ts-7000] Onboard user reset.

To:
Subject:	[ts-7000] Onboard user reset.
From:	"sagittarian_savvy" <>
Date:	Tue, 07 Mar 2006 10:05:45 -0000

Hi,
   I am using TS-7250 board and I wanted to know about the user reset 
on the board and the importance of CPLD in routing the signals for 
reset.

     The schematic shows that a voltage supervisor IC routes the reset 
signals to the CPLD but after that where the signal goes and where it 
emerges is a mystery to me..

Can I do away with the CPLD and give the reset signals directly to the 
processor...?

Anybody?





 
Yahoo! Groups Links

<*> To visit your group on the web, go to:
    http://groups.yahoo.com/group/ts-7000/

<*> To unsubscribe from this group, send an email to:
    

<*> Your use of Yahoo! Groups is subject to:
    http://docs.yahoo.com/info/terms/

<Prev in Thread]	Current Thread	[Next in Thread>
[ts-7000] Onboard user reset., sagittarian_savvy <=

Previous by Date:	[ts-7000] SDRAM SIGNALS, joel garner
Next by Date:	[ts-7000] Re: chip select pins, pickanameanditstakensoihavethis
Previous by Thread:	[ts-7000] SDRAM SIGNALS, joel garner
Next by Thread:	[ts-7000] Are the Libraries in Synch now?, vocemanago
Indexes:	[Date] [Thread] [Top] [All Lists]

Disclaimer: Neither Andrew Taylor nor the University of NSW School of Computer and Engineering take any responsibility for the contents of this archive. It is purely a compilation of material sent by many people to the birding-aus mailing list. It has not been checked for accuracy nor its content verified in any way. If you wish to get material removed from the archive or have other queries about the archive e-mail Andrew Taylor at this address: andrewt@cse.unsw.EDU.AU