Hi Andrew.
I understood that part, my doubt is more basic since I´m learning HDL;
like how to assign a specific address for the ARM to write and the FPGA to
catch and put into the register to make the gpio output. But I´m, pursuing
this already and checked som eother parts of the code and have seen how this
can be made.
But as you mentioned, this busless option could be good, too.
Or even using the Avalon bus.
Thanks
Lissandro.
De: "Queisser, Andrew"
<>
Para: ""
<>
Enviadas: Quarta-feira, 10 de Novembro de
2010 22:36:25
Assunto: RE:
[ts-7000] Custom FPGA on TS7300 using
opencore
Hi
Lissandro,
The current
stub simply maps a write to any of the FPGA addresses to a single register
which appears on DIO2, so it sounds exactly like what you?re asking
for.
Are you
asking how to achieve basically the same thing without the Wishbone
bus?
Andrew
From:
[ On Behalf Of Lissandro
Sent:
Wednesday, November 10, 2010 12:18 PM
To: ts7000
group
Subject: [ts-7000] Custom FPGA on TS7300 using
opencore
Even having many years in
programming and systems analysis experience, I´m new to FPGA
programming and have a basic doubt, considering the opencores stub part
of the referred project.
How would someone assign ordefine, as a
very simple example, an ARM interface to the FPGA that would be directly
routed to the GPIO2 headers?
This is to jumpstart some tests
and for me to understand this glue coding, where the Cyclone II would behave
as a simple buffer that would receive bytes from the processor and then put
them out to the GPIO header.