While we open up most of the FPGA, we do not release the bootloader, this is
proprietary information. We can release the source code by making sure any
loads of the FPGA are loaded only in the SRAM and not the flash cells. This
makes sure the bootrom stays in place and is kept confidential. The only
caveat is that the FPGA must be reloaded every boot cycle, but this only adds a
second or two to the total time.
-Kris Bahnsen
Technologic Systems
--- In "c k" <> wrote:
>
> > Yes, it will work. I have reprogram de FPGA several times, with a
> >diferent version of the bitstream, compiling it by myself. However, I
> >haven't found a lot of information about it. I commented some verilog
> >files, but in spanish. I am still working at it, so I will be glad if
> >you could share your information.
> Did you understand how work the boot?
>
> What they mean with "CPU bootstrap is accomplished by the FPGA emulating a
> SPI flash chip. TS-BOOTROM resides in a 16KByte initialized blockram in the
> FPGA." ? I check all the files and i not find any boot code. How they
> initialize the blockram?
>
> Why and who store the mac address in the fpga?
>
> Tnx!
>
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