[ts-7000] Re: ts-7250 settle time (MAX197)

["tseredynski" <>]

--- In  Jim Jackson <> wrote:
>
> 
> 
> 
> On Tue, 26 May 2009, j.chitte wrote:
> 
> >
> > All this is rather acedemic on TS7250 as supplied since the since the 
> > 100Hz system clock means the fastest you can get from the driver is 10ms 
> > (yes you lose three orders of magnitude on what the 197 is capable of 
> > doing).
> >
> > If you want faster sampling a fair bit of work will be required.
> 
> .. which has already been done in form of the adc kernel driver by Phillip 
> McCarley. I think it's in the files area of the group.
> It can do sampling at upto aprox 8000Hz.
>


Nice to hear a lot of the work is already been done :)

I need to be sampling 4 channels at a rate of 1kHz (so if sampling sequentially 
I need a rate around 4kHz).  The TS7250 isn't capable of sampling 4 channels 
simultaneously, right? Just want to double check.

So as I understand it from what you all have been saying... there is no set 
time frame that it takes for the signal to stabilize dependent on the SBC 
itself, but rather the time frame is dependent on the output resistance of the 
circuit feeding the inputs of the SBC?  And thus I need to make my output 
resistance low enough so that the signal stabilizes within 1.5&microseconds if 
I want max sample rate?

Is there a formula to calculate how much time a signal will take to stabilize 
depending on the equivalent resistance?

Thanks for all your help!



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