Andrea Galbusera wrote:
> Hi all,
> I have a concern about loading a new bitstream on the 7350 FPGA. The
> documentation I'm referencing is the writeup linked in [1] and
> referenced by the board preliminary manual.
>
> My concern is basically related to the following sentence, which
> appear at the end of such document and apply to the shown update
> procedure:
>
> "The above code would typically be put in the /linuxrc file"
>
> Here it comes my big concern. Does the given procedure need to be
> executed at every boot? That sentence suggest me to answer positively,
> while I expected the tool load_ts7350 to update the internal FPGA
> flash with the new bitstream, making it available at next reboot.
All the bitstreams we provide update the internal RAM inside the part,
and must be loaded on every boot.
I was not involved in the development but I understand from talking to
the engineer that we ran into some issues during development of
load_ts7350 whereby loading a bitstream into flash from a user-space
program makes it very easy to brick the board.
> Since I only have the binary of load_ts7350 and I don't know how to
> check which bitstream version is installed on the FPGA (is there any
> way?), could please anybody clarify if I'm having the new bitstream
> available at reboot or not?
It is not possible to "read back" the bitstream from the FPGA. This is
a security feature and part of the design of the FPGA which we have no
control over. The best way to determine if the new bitstream is loaded
is to have a unique register value (e.g. revision number) somewhat that
you can read. However this is dependant on whoever updates the HDL code
to do this.
> Thanks in advance,
>
> Andrea
>
>
> [1] http://oz.embeddedarm.com/~michael/support/bitstream.html
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|| Software Engineer
||echnologic Systems (EmbeddedARM.com)
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