Incidentally, line 318 intentionally has RINTEN turned off - it was done
as a test to verify that the ADC interrupt was in fact causing the 14.4k
interrupts per second.
Cheers,
-Brett
Breton M. Saunders wrote:
> Hi Charlie,
>
> I checked the TIN bit - it is set. This bit is also known as ADCEN in
> the EP9302 manual. In the kernel 2.6.27 I have has this bit defined
> incorrectly as 0x00010000 (and this may well be incorrect in mainline).
> I am using 0x00020000 as described in the ep93xx manual, using
> SYSCON_DEVCFG_TIN.
>
> When I change the clock rate I don't seem to notice any difference in
> the interrupt rate. I think something screwy is going on, as the
> interrupt rate looks like pretty much bang on the external oscillator
> rate divided by 1000. I also noticed that if I turn off the ADC
> interrupt bit (RINTEN) that I observe no interrupts; hence I must be
> triggering off of the correct interrupt line.
>
> I am counting interrupts by looking at the count value displayed in
> /proc/interrupts.
>
> I've attached the source code here, which may give some further
> insights. Also, of note, I worked out from the ep9312 manual the switch
> settings to measure ground and vcc to measure the full-scale range of
> the ADC; since the ep93xx are all the same die with different bondings.
>
> Hopefully there is something obviously wrong in this code!
>
> Cheers,
>
> -Brett
>
>
>
>
>
>
> charliem_1216 wrote:
>
>> Hi Brett --
>>
>> --- In "Breton M. Saunders" <>
>> wrote:
>>
>>
>>> Hi,
>>>
>>> Has anyone successfully run the EP93xx ADC in interrupt mode?
>>>
>>>
>> No, I haven't tried.
>>
>>
>>
>>> I am finding that the ADC (or rather touch screen interrupt) is stuck
>>> on - and fires at a rate of ~14.47 KHz, irrespective of whether the SDR
>>> (Synchronous data ready bit) is set or not; meaning that partially
>>> completed conversions are reported.
>>>
>>> This is what my setup looks like:
>>>
>>> reg EP93XX_TSSETUP: 00000000
>>> reg EP93XX_TSXYMAXMIN: 00000000
>>> reg EP93XX_ADC_RESULT: 00002a68
>>> reg EP93XX_TSDISCHARGE: 00000000
>>> reg EP93XX_TSXSAMPLE: 00000000
>>> reg EP93XX_TSYSAMPLE: 00000000
>>> reg EP93XX_ADC_SWITCH: 00000608
>>> reg EP93XX_TSDETECT: 00000000
>>> reg EP93XX_ADC_SWLOCK: 00000000
>>> reg EP93XX_ADC_ADCINTEN: 00000800
>>>
>>> Anyone have any ideas?
>>>
>>>
>> What is TIN (bit17 in DeviceCfg, 0x8093_0080)? It's supposed to be 1 to
>> turn off the TS controller (Touchscreen INactive), so the ADC can be used
>> directly. I know the 9302 isn't supposed to have the TS controller, but it
>> doesn't hurt to check.
>>
>> If you change the ADC clock divider (KeyTchClkDiv), does the interrupt rate
>> change from 14.47 kHz?
>>
>> regards, ........ Charlie
>>
>>
>>
>>> -Brett
>>>
>>>
>>>
>>
>>
>> ------------------------------------
>>
>> Yahoo! Groups Links
>>
>>
>>
>>
>
>
>
> ------------------------------------
>
> Yahoo! Groups Links
>
>
>
>
------------------------------------
Yahoo! Groups Links
<*> To visit your group on the web, go to:
http://groups.yahoo.com/group/ts-7000/
<*> Your email settings:
Individual Email | Traditional
<*> To change settings online go to:
http://groups.yahoo.com/group/ts-7000/join
(Yahoo! ID required)
<*> To change settings via email:
<*> To unsubscribe from this group, send an email to:
<*> Your use of Yahoo! Groups is subject to:
http://docs.yahoo.com/info/terms/
|