Re: [ts-7000] TS-7300 IOCTL Code.

It's not that obvious but here's how I did it, this is a basic outline and some of it is pseudocode because I'm doing it from memory.

The end result of the following is that when you write to your 32-bit registers reg0, reg1, reg2, the data arrives at corresponding registers reg0, reg1, reg2 in ts7300_top (FPGA).

In your program:

// registers
volatile unsigned int *fpga_base;
volatile unsigned int *reg0;
volatile unsigned int *reg1;
volatile unsigned int *reg2;

fd = open ("/dev/mem");

// memory map fpga
fpga_base = mmap( fd,  base address of FPGA  );

reg0 = fpga_base + 0;
reg1 = fpga_base + 1;
reg2 = fpga_base + 2;


Now in ts7300_top.v:

// local registers we're writting in to
reg [32:0] reg0;
reg [32:0] reg1;
reg [32:0] reg2;

wire [8:0] addr;
assign addr = wb_addr_i[8:0];

always @ (posedge wb_clk)
begin
  if (a write is occuring)
  begin
  //decode source address of this write and put it in appropriate local register
         case (addr)
             8'h00: reg0 <= wb_dat_i;
             8'h01: reg1 <= wb_dat_i;
             8'h02: reg2 <= wb_dat_i;
         endcase
  end
end

Hope it helps..
Mike


--- On Thu, 1/22/09, Mr Speaker to Dirt <> wrote:

From: Mr Speaker to Dirt <>
Subject: [ts-7000] TS-7300 IOCTL Code.
To:
Received: Thursday, January 22, 2009, 6:33 AM

Hey All:

I cant seem to find any docs or mention of docs or sample programs
so I can get a taste of how to interface my software to the ts7300_top
fpga image? Sorry if I missed something obvious.

Andrew

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