You speak as if there are registers in which to write. There are
no registers - if you don't implement them with fpga code, that is.
To implement such registers, you need to know what signals appear
on the wishbone bus and how the time of the appearance of one relates
to another, and so on. This is why you need the wishbone documentation.
There is a dummy fpga-implemented register in the example code
supplied by TS, but it performs no useful function.
--- In "mmcdonal2001" <> wrote:
>
> Hello:
>
> Can anyone with experience on the TS7300 Cyclone II FPGA and opencore
> ts7300_top help me with the following:
>
> From ts7300_top.v:
>
> /* This module is a sample dummy stub that can be filled in by the
> user. Any access's on
> * the TS-7300 CPU for address 0x72a00000 to 0x72fffffc arrive here.
> Keep in mind
> * the address is a word address not the byte address and address 0x0
> is 0x72000000.
> * The interface used here is the WISHBONE bus, described in detail on
> * http://www.opencores.org
>
> I understand the Wishbone part and that writes to the FPGA will end up
> in a 32-bit register with will subsequently drive the pins on the
> header next to the chip, but what do they mean by "Word address not
> byte address". If I want to write to the 32-bit register from a C
> program for instance, how and where do I write.
>
> Thank you.
>
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