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Is it possible to program the FPGA on the 7800 to poll the DIO inputs on a programmable frequency (i.e., I specify), and store state change counts in a FIFO buffer? I need to poll the inputs at-least as fast as 100hz (not Mhz), but instead of creating a thread and wasting cpu cycles to accomplish this, I'd like the FPGA to do the polling, then I'll poll the FIFO (maybe 10hz or 1hz, or even every 10 seconds... considerably less frequently than the FPGA). 2 Questions: 1) Is this technically possible / plausible 2) Who can I pay to accomplish this? Eric __._,_.___
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