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[ts-7000] Barking up wrong tree?

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Subject: [ts-7000] Barking up wrong tree?
From: "pgb_psu" <>
Date: Tue, 30 Oct 2007 18:54:31 -0000
I've posted several questions to the forum, always with timely and helpful 
responses.  I'm 
hopeful that continues because I'd really like some input on design choices 
from the 
people here who have experience using the TS products.  

The project I'm working on basically consists of getting 4 channels of 24-bit 
data from an 
AD1871 (hi-fi ADC chip) @ 10Khz per channel into the TS continually.   The 
system spec is 
that some down-sampled version of these data are always spit out the ethernet 
port after 
a bit of processing (such as formatting and adding headers to the data). .  
When a remote 
computer tells the TS to do so, full resolution data are written to disk.  
Stored files would 
be less than 30 seconds in length.  Ideally, while writing data to disk, data 
would still be 
spit out the ethernet port.  

My solution to this started with the TS-7260 (because our application also has 
a low 
power requirement).  I tried reading data via the SPI port, but couldn't get 
that working.  So 
I moved to a an 8-bit read.  By placing some additional hardware between the 
AD1871 
and the TS, I can take the 80Khz (we've slowed down the AD1871 from 96 to 80khz 
by 
using slower master clock) data that the AD1871 chip produces and average it 
down to 
10Khz per channel.  Adding some parity and channel codes in an additional 
8-bits, our 
sample size has grown from 24 to 32 bits.  The external hardware allows me to 
pass the 
now 32-bit samples to the TS as 8-bit chunks and re-assemble them on the TS.  I 
started 
out using the DIO_0-7 lines as well as a couple others for handshaking, but was 
always 
having trouble with one bit in that group (on two different TS boards, one 
running the 
fast-boot shell, on running the full debian).  So I moved that code over to the 
LCD header 
where the whole setup works.  The C code I've written for the TS is a while 
loop that 
simply keeps reading the FRAME pin from the external device.  When data are 
ready the TS 
grabs them, passing them to the next program which re-assembles them into 
24-bit 
samples and shoves them into a socket program.  They pop up on the other end of 
the 
socket as expected.  If data are not ready, the main program simply reads 
again.  
Surprisingly, this works rather well.  Despite the heavy toll on the CPU, this 
manages to 
collect more than 98% of all samples in time.  Percentage wise there aren't 
many drop-
outs, but when recording at 40Khz total  for 30 seconds even one 
percent is too 
much.  Besides, it's not a very elegant solution and we'd like to be able to do 
some other 
things (like compression) onboard the ARM. 

Iterating on this, we are now trying a kernel driver that spots an interrupt on 
one of the 
GPIO pins.  The idea being that the CPU can have a break and only needs to do 
what we 
want when interrupted.  Passing four 8-bit chunks of data for each of out 10Khz 
samples 
times 4 channels results in an interrupt rate of 160Khz.  I haven't gotten this 
working yet 
so I'm unable to answer question one below.  But I have a hunch.   I don't 
think this is 
doable.  

I have two questions for the forum:
1.  Can we expect the TS-7260 to process interrupts at this rate?  
2.  How would you solve this problem?  

This has been a terrific learning experience for me, but I still consider 
myself a novice.  
Most of my C code is built on examples from others, the kernel driver I'm 
working from is 
almost verbatim from the gps_pps driver included on the Files section.  What 
I'm trying to 
say is stuff like DMA is not part of my vocabulary (yet).  I have a TS-7260 and 
a TS-7300.  
However, I think the solution might be using the I2S feature of the ARM chip 
which would 
require a TS-7400.  Before dropping more money on this I wanted to solicit 
input from all 
the knowledgeable folks on this forum.  

Thanks in advance for you input.
Regards,
Peter



 
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