[ts-7000] TS-7300 FPGA

["bibhu" <>]

Hi ,

I have a simple flip-flop program in Verilog.

1)How do I load the raw binary files on the FPGA? Or do I need to load 
any other files?
2)How do I check the output?
3)Is it possible to connect the TS-7300 board to a logic analyzer? 

I had worked on FPGAs 2-3 years back. I had used JTAG cables and all.
I realized we don't need any JTAG cables for TS-7300.

Thanks,

Bibhu



 
Yahoo! Groups Links

<*> To visit your group on the web, go to:
    http://groups.yahoo.com/group/ts-7000/

<*> Your email settings:
    Individual Email | Traditional

<*> To change settings online go to:
    http://groups.yahoo.com/group/ts-7000/join
    (Yahoo! ID required)

<*> To change settings via email:
     
    

<*> To unsubscribe from this group, send an email to:
    

<*> Your use of Yahoo! Groups is subject to:
    http://docs.yahoo.com/info/terms/