Don't despair! It has been our intention for this all along, but we
got caught up in some of the details of the method and terms of
distribution. (netlist vs. source code vs. pin documentation-only
etc..)
We're currently working with a professor at Arizona State University
who is designing a FPGA course around the TS-7300 FPGA and using his
requirements as a sort of reference usage case. Hopefully, not only
can we get something so to jumpstart some open-source FPGA
development RSN, but we might be able to have some professional
training material on the TS-7300 and FPGA to offer the people
wanting to work in Verilog/VHDL.
What we've decided we'd like to do is submit a GPL'ed boilerplate
project to opencores.org or something equivalent that includes the
pin-locks, Altera Quartus assignments and constraints, and our bus-
cycle demultiplexing logic as a bridge to an internal "wishbone" bus
SoC interconnect. Attached to that internal wishbone bus would be
the ethernet core and perhaps a cute example of using a register in
the memory space of the EP9302 CPU to control the LED's. (The
hardware equivalent of "Hello World")
As the sole copyright holder of the boilerplate, TS would have the
ability to re-license the initially submitted code to specific
customers under something other than the GPL should someone want to
use it in a proprietary derived work, otherwise any
extensions/derivations must be made GPL. Here, the GPL is the
perfect license for us-- as long as you give back your work and
designs freely, you can use it freely. Our hope is that it foster
open-source development, but also give businesses the opportunity to
avoid the viral nature of the GPL as it relates to their own derived
works by contacting TS directly for a different license.
//Jesse Off
--- In "Heilpern, Mark" <>
wrote:
>
> My own thoughts...
>
> >I don't think you should need to release the Verilog code for the
> firmware of
> >your FPGA, even if you link the binary firmware in the kernel.
But I do
> think
> >you should include the source of the C code that loads the
bitstream
> into the
> >FPGA. However, it would increase your sales if you did include the
> Verilog
> >code, as students could now use the TS-7300 as a learning tool,
And
> people
> >could extend the FPGA in meaningfull ways.
>
> I purchased the TS-7300 specifically because it was advertised as
having
> the
> FPGA. My interpretation of that in the advertisement was that it
was
> there for
> me to make use of, and I expected the deliverable would include
> documentation
> and data (Verilog or binary form) to allow me to add additional
> functionality,
> perhaps remove existing functionality (for space), etc. I was
rather
> disappointed
> to learn the current truth (and I'm hopeful that my expectations
will
> eventually
> be met with this product). Not only would this allow people to
extend
> the FPGA
> in meaningful ways, it could bring the value of "Open Source" to a
whole
> new
> level (and with TS hardware being at the center of it).
>
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