On Thu, 30 Jun 2011, y2kvaguy wrote:
>
>
>
>
>
>
>
> Thanks for the quick reply.
>
> Ok, so I cribbed together a test based on supplied sample code. Here it is:
>
> <begin code segment>
> /*
> * tst2.c: testing register access
> */
>
> #include <unistd.h>
> #include <sys/types.h>
> #include <sys/mman.h>
> #include <stdio.h>
> #include <fcntl.h>
>
> int main(int argc, char **argv) {
> volatile unsigned int *XD2M, *XD2DDR, *XD2DR;
> unsigned char *start;
> int regaddr;
> int readback;
>
> if(argc < 2) {
> printf("Wrong number of args.\n");
> return -1;
> }
> else {
> sscanf(argv[1], "%x", ®addr);
> printf("register address (hex): 0x%x\n", regaddr);
>
> int fd = open("/dev/mem", O_RDWR);
> start = mmap(0, getpagesize(), PROT_READ|PROT_WRITE, MAP_SHARED, fd,
> regaddr);
read the man page for mmap.
The address given to mmap must be on a page boundary. so you need to split
your address into 2 parts, the page address and the offset within the page.
Once you have start, use start+offset.
There is a further comlication. If you address is a byte address, then the
offset to use for integer pointers is offset/4 - this is an artefact of
the way C does pointer arithmetic. If you are accessing only bytes, then
use byte pointers and all is simple.
>
> XD2M = (unsigned int *)(start); //XDIO2 mode
> XD2DDR = (unsigned int *)(start + 0x01); //XDIO2 direction
> XD2DR = (unsigned int *)(start + 0x02); //XDIO2 data
>
> *XD2M = 0x00; //do a simple write the specified register
>
> readback = *XD2M; //read the value back
> printf("\nReadback: 0x%x\n", readback);
>
> close(fd);
> return 0;
> }
>
> }
> <end code segment>
>
> The result looks like this:
>
>
> :tests# ./tst2 0x72200000
> register address (hex): 0x72200000
>
> Readback: 0x0
> :tests# ./tst2 0x72200040
> register address (hex): 0x72200040
> Segmentation fault
> :tests# ./tst2 0x72200044
> register address (hex): 0x72200044
> Segmentation fault
> :tests#
>
> This is why I'm wondering about the correct memory map and/or FPGA
> bitstream load. What *should* be at 0x72200000 is the FPGA SDRAM region. At
> 0x72000040 and 0x72000044 should be the mode registers for the XDIO ports.
>
> I performed similar tests using the supplied peek8 and poke8 binaries.
> The board doesn't seem to like access attempts to these registers, but I can
> access some other areas.
>
> Can anyone share info on how they manage simple digital I/O on this
> board? Thanks in advance.
>
> -Mark
>
>
> --- In "al" <> wrote:
> >
> > I am familiar with the TS-7500 and can tell you why what you are doing
> > would crash it. First, the memory-mapped IO spaces are outside of your
> > applications local memory range. The IO memory locations must be mapped
> > into your app, else you will get a fatal memory seg fault. Second, if the
> > 7300 is anything like the 7500, you must issue sbuslock() before issuing
> > read/write commands into IO space and follow that with sbusunlock()
> > immediately following your IO. The sbuslock command does two things, it
> > maps the IO memory segment you are trying to access into your app and it
> > locks out other apps from attempting to do IO at the same time. Note that
> > the lock is good only between processes, not threads. We added Posix
> > pthread_ semaphore locking to the 7500 sbuslock/unlock routines so that our
> > multi-threaded apps run with no IO contention or overlap.
> >
> > Check your programming manual for proper IO space access and peruse the
> > sample code available on the TS web site.
> >
> > HTH
> >
> > --- In "y2kvaguy" <loudcussing@> wrote:
> > >
> > > I'm not new to embedded computers, Linux, or programming, but I'm new
> > > to the TS-7300. I'll be using them to control a number of test fixtures
> > > that I'm developing.
> > >
> > > I wanted to twiddle the I/O on the card and start mapping out how I'll
> > > be connecting things I want controlled by it. I wanted to connect first
> > > to the XDIO2 port, which according to the docs, is controlled via
> > > registers at 0x72000044 thru 0x72000047. I am using the default just
> > > about everything, and I don't have a special FPGA bitstream loaded. The
> > > bitstream is the default setup with the SD card that came with the
> > > development kit, which appears to be ts7300_cyclone2_640x480.rbf
> > >
> > > The first "tools" I reached for were the supplied utilities called
> > > peek8 and poke8. Should be pretty simple stuff, right? First thing I
> > > want is to have the port in "mode 0" so I can do basic digital I/O.
> > > Well, when I issue the command:
> > >
> > > poke8 0x72000044 0
> > >
> > > then
> > >
> > > peek8 0x72000044
> > >
> > > ...to read back the register after I write it, the board locks up.
> > > Nothing works - forget multitasking where you might be able to kill the
> > > offending task. I have to cycle power. I've sometimes had the peek8
> > > binary work, and I always read 0xfe from that location. But if I repeat
> > > the command just a few times, the board will eventually lock up,
> > > requiring power cycle, fsck, etc.
> > >
> > > Something curious that I noticed, too. The peek8 binary currently up
> > > on the ftp site is a zero length file. The version I have must be from
> > > the CD supplied with the Dev kit.
> > >
> > > Anyway, there has *got* to be something really basic that I'm missing
> > > here, like having the wrong thing in the FPGA. I searched this group and
> > > didn't find anything. I'll keep looking, but in the mean time, anyone
> > > have this problem, and more importantly, a fix? Thanks in advance.
> > >
> > > -Mark
> > >
> >
>
>
>
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