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Re: [ts-7000] ADC sampling rate + averaging

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Subject: Re: [ts-7000] ADC sampling rate + averaging
From:
Date: Thu, 14 Apr 2011 14:55:38 -0700
On 21:15 Wed 13 Apr     , Joel Morgan wrote:
> what is the question?

Can we change the sampling rate (slow it down)?
Well, it may not be required!

> > Apparently I read the register ( as fast as a C loop can go) and I see
> > no effect of the averaging....
> 
> don't forget to poll the SDR bit of the ADCResult register. When it is
> set a new reading is ready. It is cleared when the result is read.

Ok, I use the code in ep93xx_adc.h, which polls the ADCResult ...

int read_channel(unsigned long adc_page, unsigned short channel)
{
        unsigned long val;

        POKE32(adc_page + ADCSWLOCK_OFFSET, UNLOCK_VAL); //unlock the soft lock

        //write ADCSwitch reg to select channel
        POKE32(adc_page + ADCSWITCH_OFFSET, channel);

        while(is_ADC_busy(adc_page)); //poll ADCResult

        //read result from data regisyyter
        val = PEEK32(adc_page + DATA_OFFSET) ;

        val = val & DATA_MASK;

        return val;
}

static char is_ADC_busy(unsigned long adc_page)
{
        unsigned long val;

        val = PEEK32(adc_page + ADCRESULT_OFFSET);

        if((val & SDR_MASK) == SDR_MASK)
                return PEEKPOKE_TRUE;

        return PEEKPOKE_FALSE;
}


There is another question I forgot to ask.
I have a 12 bits ADC, between 0 and 3.3v.
The values I read are between ~40000 (0v) and ~90000 (3.3v)
I understand there is some paddingi on the MSB side.
 But why is the range more than 50K values (~ 16-bit) ?
Is there also some padding on the LSB side?

-- 
Emmanuel


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