Re: [ts-7000] Re: SPI interface on TS7500

["Gregory W. Maglathlin" <>]

Hi Anthony,
Actually, the basics of the SPI interface are included in all FPGAs after version 4.
All I did was modify the IO pins used for chip select to be more convienent (ie
use I/Os that come out on the 20 pin header of the 752) and change the speed
selections available (I believe that TS did this on later revs of the FPGA).  I am currently
overseas but will look through my stuff to find the mods I made, they were very minor.
Meanwhile, I suggest you download the Verilog development environment, the FPGA
source code and rebuild the FPGA in its vanilla form.  I think you will find the learning
curve on the tools and how to migrate the newly built code into the FPGA actually to be
more difficult than the mods themselves unless you have done all this before.

Best regards,
Greg


On 1/14/2011 12:32 PM, anthony122176 wrote:

 

Greg,

I would be very interested in hearing more about how you implemented spi communication in the FGPA core of the 7500. We would like to avoid bit banging if it is at all possible. And from what I understand the only options for spi on the ts7500 are bit banging or programming the FPGA as you suggested.

Can you point me toward more information?

If possible can you send the hdl or source that you used for the FPGA that gave you successful spi communication?

Thanks!

--- In , "gmaglathlin" m("...","maglathlin");"><> wrote:
>
> Actually if you use version 4 of the FPGA core a programmable SPI
> interface is supported. I modified the core to use different I/Os for
> Chip select #2 and #3. Specifically I changed the FPGA to use DIO 21
> for CS #2 and DIO 22 for CS#3. This allows me to use the FPGA SPI
> interface to read the TS-752 temperature sensor in approximately 2 usec
> with the following 5 instructions (works beautifully). You can still bit
> bang to get the data (as in the sbus.c gettemp() routine but this takes
> significantly longer.
>
> sbus_poke16(0x40, (0 << 14) | (15 << 10) | (3 << 8));
> sbus_poke16(0x4c, 0x8000);
> val = sbus_peek16(0x42) >> 3;
> if((val & 0x1000) != 0) val=((~(val & 0xfff) & 0xfff) + 1);
> temperature = (float) val * 62500.0 / 1000000.0;
>
> Modifying CS#2 to use DIO 21 allows for the interface of another spi
> device via the 20 pin header.
> I suggest looking at the latest ts-75xx/tsa-4500 document (published Feb
> 2010) and the fpga open core source code. Utilizing the free fpga
> devlopment software is a bit of a learning curve but well worth it. I
> think TS's decision to use the opencore framework for the 7500 is rather
> cool.
>
> Good luck,
> Greg
>
>
>
>
>
>
> --- In , Razvan-Ionut Stoian
> <razvan_ionut_stoian@> wrote:
> >
> > TS7500 does not have a specific hardware SPI port (no hardware pins
> assigned).
> >
> > You have to bit bang 3 GPIOs in order to create the SPI port.
> > (Unfortunately, TS does not specify this in their docs.)
> >
> >
> > --- On Wed, 2/24/10, Jongsoo Kim jongsoo.kim@ wrote:
> >
> > From: Jongsoo Kim jongsoo.kim@
> > Subject: [ts-7000] SPI interface on TS7500
> > To:
> > Cc: "'xinping guo'" xinpingguo@
> > Date: Wednesday, February 24, 2010, 5:40 PM
> >
> >
> >
> >
> >
> >
> >
> > Â
> >
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> >
> >
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> >
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> >
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> >
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> > Group
> >
> > Â
> >
> > I am trying to configure SPI interface to use AD converter (
> > AD 7927).
> >
> > I am having some following issue
> >
> > Â
> >
> > 1) generate CS# on DIO#11
> >
> > 2) generalte SPI clk whenver SPI read or write command is
> > issued
> >
> > 3) configure SPI as 16 bits data access
> >
> > 4) need to write to SPI reg#48 to configure the control
> > register (select channel, voltage range, power manager) and then read
> this
> > register to get the AD data.
> >
> > Â
> >
> > Â
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> > I would appreciate if someone can advise me.
> >
> > Â
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> > Â
> >
> > Thanks
> >
> > Â
> >
> > Jongsoo Kim
> >
> > Â
> >
>

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