RE: [ts-7000] Re: Standard SPI vs. 3 wire SPI

["Russell N. Nelson - rnnelson" <>]

If the ADC requires you to send it a command, or configuration, then 3-wire SPI will not work.

Razvan-Ionut Stoian <> wrote:

Sorry for the late feedback.

Neither of the two situations seems responsible for this behavior. It could be that the ADCs I tested were bad.

On the other hand, the SPI master might not be backward compatible with the 3-wire standard, as one poster suggested.

I'll post a solution when I find one.

Thanks a lot,
R.

--- On Wed, 12/8/10, Russell N. Nelson - rnnelson <> wrote:

From: Russell N. Nelson - rnnelson <>
Subject: RE: [ts-7000] Re: Standard SPI vs. 3 wire SPI
To: "" <>
Date: Wednesday, December 8, 2010, 10:20 AM

 

Sounds like 1) you could be clocking in all ones into the MISO pin. Have you checked to see that the bit values on that pin are varying? or 2) that you're reading the wrong location, and getting the bus's floating value.
________________________________________
From: [] on behalf of razvan_ionut_stoian []
Sent: Tuesday, December 07, 2010 7:34 PM
To:
Subject: [ts-7000] Re: Standard SPI vs. 3 wire SPI

Thank you all for your answers.

First of all, my SBC is not a TS7200, but a AT91SAM9G20 based SBC.

The SPI on most Atmel procs. works like this: the transmit register has three parts: the command that one sends to the slave (i.e., channel selection), the selection of the current CS pin and a "last transfer" bit that makes the CS go high after that particular transfer.

Every time I transmit a command, I check the status of the "read buffer". When it's full, I read the result in the Rx register.

The only thing that I get at reading time is 983039.

This is the sequence used to get the conversion result:

*((unsigned int *) (spi1_base + AT91C_SPI1_TDR )) = 0xFFF|SPI_PCS(0) | AT91C_SPI_LASTXFER ;
while (!(*((unsigned int *) (spi1_base + AT91C_SPI1_SR))&AT91C_SPI_RDRF )){}
buffer = *((unsigned int *) (spi1_base + AT91C_SPI1_RDR))&0xFFF;

The input of the ADC is wired to a pot that works as a voltage divider. No matter the position, I only get 4095.

R.

--- In , Jason Stahls <> wrote:
>
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
>
> On 12/06/10 10:05, razvan_ionut_stoian wrote:
> > Hi.
> >
> > Does anybody know how to modify (hardware and software) a typical SPI interface (CLK/MOSI/MISO/CS) into a 3-wire SPI (no MOSI line)?
> >
> > In order to receive a word from the slave, one has to send a dummy command from master to slave. Since there is no MOSI line, how can the serialization of the received data be possible?
>
> Easy, it's not synchronous. You assert CS, clock a command to the
> device, then depending on implementation you signal the device to
> transmit (by toggling CS or stopping the clock) or you don't. When the
> slave transmits the master keeps clocking till the slave finishes.
> Check the chip's datasheet it should give you a detailed protocol
> breakdown. If the hardware SPI interface can handle it is a different
> question :) Doing it in software on a couple GPIO pins wouldn't be hard
> tho.
>
> - --
> Jason Stahls
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