Here's a snippet from the ts7300_top.v file that's part of the TS7300 opencores project:
/* Bus cycles from the ep9302 processor come in to the FPGA multiplexed by
* the MAX2 CPLD on the TS-7300. Any access on the ep9302 for addresses
* 0x72000000 - 0x72ffffff are routed to the FPGA. The ep9302 CS7 SMCBCR register
* at 0x8008001c physical should be set to 0x10004508 -- 16-bit,
* ~120 nS bus cycle. The FPGA must be loaded and sending 75Mhz to the MAX2
* on clk_75mhz_pad before any bus cycles are attempted.
*
* Since the native multiplexed bus is a little unfriendly to deal with
* and non-standard, as our first order of business we translate it into
* something more easily understood and better documented: a 16 bit WISHBONE bus.
*/
So the bus you'd work with on the FPGA side is the opencores "Wishbone". The FPGA clock is 75MHz and from the sound of it the EP9302 bus cycles are 120ns/16 bit. That
should give you a rough idea of the possible throughput.
Andrew
--- In ts-7000%40yahoogroups.com, Lissandro <> wrote:
>
> And regarding the Cyclone II I/O, what exactly is the processor interface with
> it?
> Does anyone can inform what is the ARM - FPGA interface clock/speed?
>
> I need to have a huge data throughput and if the FPGA - ARM interface is
> something better than the slow 14MHz GPIO then maybe I can manage to have a
> faster I/O on the FPGA side than on the GPIO ARM sideà by making some custom code
> inside it.
>
> Thanks
> Lissandro.
>
>
>
>
> ________________________________
> De: Lissandro <>
> Para:
> Enviadas: Quinta-feira, 4 de Novembro de 2010 17:32:57
> Assunto: Res: [ts-7000] I/O, kernel mode...
>
> Ã
> Well, looking the datasheet it seems that 7300ÃÂs gpio shares a 14.xxx mhz
> peripheral buz clock, so... :-)
>
>
>
>
> ________________________________
> De: Razvan-Ionut Stoian <>
> Para: ts-7000%40yahoogroups.com
> Enviadas: Quinta-feira, 4 de Novembro de 2010 11:26:44
> Assunto: Re: [ts-7000] I/O, kernel mode...
>
> Ã
>
> I never drove the EP9302's GPIOs so fast. In general, GPIOs pins toggle at a
> much lower frequencyà than the main processor clock.
>
>
> Don't expect to have toggling times of 1/(200 MHz).
>
> For example, the Atmel (400 MHz) and OMAP3530 (600 MHz) - based boards I have
> feature GPIO switching times of 50 and 120 ns, respectively. Judging by
> processor speed, the OMAP GPIOs should have been faster on the OMAP3550 board.
>
>
> The only reason for thisà is that all GPIO banks are tied to a different clock
> domain (usually, the main clock divided by at least 2).
>
> just my $0.02.
>
>
> --- On Thu, 11/4/10, Lissandro <> wrote:
>
>
> >From: Lissandro <>
> >Subject: [ts-7000] I/O, kernel mode...
> >To: "ts7000 group" <ts-7000%40yahoogroups.com>
> >Date: Thursday,
November 4, 2010, 8:42 AM
> >
> >
> >Ã
> >Hi
> >
> >IÃÂve being struggling with the 7300 board in order to make a small software that
> >
> >would make a faster use of GPIOs.
> >
> >Well maybe I should try other interfaces, but anyway my question is.
> >
> >- While having a 200 MHz ARM running in the board, so far I was able to make I/O
> >
> >changes using the sample code and mmap that have reached nearly 13MHz speed
> >(say, a 7MHz or so "square" wave output). I think one should be able to put out
>
> >something like a 50 MHz sq wave or even more, doing some direct I/O. In order to
> >
> >accomplish that, I should run the software in kernel mode? Or is there any other
> >
> >way.
> >
> >Thanks :-)
> >
> >
>
> Ã
>