For those of you who do not have the EP9302 Data Sheet, here is a brief summary
of the ADC information.
The lower 16 bits of the ADCResult register contain a 16-bit signed value.
This value can be from -25000 to +25000 decimal.
+25000 = 0x61A8 = Vref
0 = 0x0000 = Vref/2
-25000 = 0x9E58 = 0 V
--- In "Breton M. Saunders" <>
wrote:
>
> On 08/18/2010 04:53 PM, Joel Morgan wrote:
> > Hello Everyone,
> > I am using the 2 externally available ADC channels on my 7260s with a
> > modified version of technologics sample code (adc_7250). I am confused
> > about a conflict with what I think should come out of a 12 bit ADC and
> > what really happens.
> >
> > Page 519 in the ep9301 UG says the ADCResult register (0x8090_0008)
> > contains:
> > bits 0-11 - 12 bit adc output
> > bits 12-30 - reserved. unknown during read
> > bit 31 - synchronous data ready
> >
> > TS says after reading this register, mask off the upper 16 bits.
> > reading their code I see they are expecting between 0x7000 and
> > 0x17000:
> > if (result< 0x7000)
> > result = result + 0x10000
> >
> > My question is: why does this work? using 4 extra reserved bits and if
> > its too low assume an overflow? I must be missing something simple.
> >
> I'm pretty sure that it is a 16 bit ADC; its just that you're likely to
> find a lot of noise in the lower 4 bits.
>
> Also, get the data sheet (the short one) off of Cirrus' web site. It
> explains the transfer function for the ADC; TS's code is just the
> inverse of this; creating an unsigned output.
>
> I think that there are some bits you can hack to make this thing
> unsigned. You can also measure the zero offset and +3.3V offset by
> writing the appropriate (undocumented) bits to the matrix switch - if
> you look at the ep9315 manual and use its figures for the matrix
> controller you can work out which bits to set.
>
> -Brett
>
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