--- In "j.chitte" <> wrote:
>
>
>
>
>
> --- In "mccarl1978" <mccarl1978@> wrote:
> >
> >
> > >
> > > The one big downside is that it seems to be set (non adjustable) at
> > > +/-10V and I need 0-5V
> > >
> > > The readme says it's set in the code but at a first reading I can't see
> > > where. Anyone looked at this?
> > >
> >
> > The lines that you are looking for are lines 168 & 188 of adc_hwtimer.c
> >
> > Check adc_hwtimer.h for the defines that you can use for different ranges,
> > etc.
> >
> > Cheers
> > Phil
> >
>
> Thanks , it was a great help knowing that's all I needed to look at.
>
> I now have the platform and /dev drivers and my userland C code to work with.
>
> Am I correct in thinking that the primary limit on sampling freq is the timer
> resolution? It seems it can't do much better than 10kS/s on single channel
> readings.
>
> What would be the best strategy for approaching the 100k limit of the MAX
> chip? I know I won't get there but I'm interested in the limits of the board.
>
> Oh, and thanks for a nice clean example of how to write a kernel driver. ;)
>
The timer resolution on the EP93xx is normally 508kHz for Timer1-3, and that's
not the limit in this case.
My experience from the board is that the jitter will be 1-15ms
The kernel will turn off interrupts for several ms, (up to 15ms on a 7250 board
with 2.6.29 kernel)
The requirements in my case was a sampling rate of 2.5 kHz with jitter less
than 200us. I guess that you can figure it out the limitations of the kernel.
I implemented Xenomai (a Real time Linux patch) to the 7250 board with dynamic
timer ticks. It works great, with an interrupt latency of ~20-120us
Right now I'm running Max197 at 5kHz with RMS calc on 4 channels and it gives a
CPU load of 1.5%.
Regards
Hans
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