According to the manual, when you tell the AVR to start sampling the ADC, it
reads and stores 2048 samples at 2 KHz. So it samples for 1.024 seconds. If you
wait until the last sample has been written to the FPGA buffer, and then tell
the AVR to start sampling again, and do that 4 times, then you should get 4
sets of 2048 samples in 4.096 seconds.
--- In "rodriguezromain62" <>
wrote:
>
> Hello everybody, for the moment I do 4 analog conversion with the basic
> program ts7800ctl.c
> It works, but to do the 4 conversions, i need 8sec :S
> when I try to reduce the samples (default is 1024)
> and the usleep (default is 1500000) my value isn't good :'(
> I understand its because the analog_conversion isn't ready to do another
> conversion. But I imagine I can reduce my 8sec times with your help!!
>
> Thank you. (sorry for my English)
>
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