andygal76 wrote:
>> It is not possible to "read back" the bitstream from the FPGA. This is
>> a security feature and part of the design of the FPGA which we have no
>> control over. The best way to determine if the new bitstream is loaded
>> is to have a unique register value (e.g. revision number) somewhat that
>> you can read. However this is dependant on whoever updates the HDL code
>> to do this.
>
> Any idea if something similar is implemented for TS-7350 bitstreams? Could
> you suggest a better place to ask?
There is a revision number implemented as part of the model ID register
in the TS-7350, but we don't yet have a formal process that insures that
this gets properly incremented each time a change is made to the FPGA.
(And since it is only 4 bits long it definitely wasn't designed to be
incremented on minor changes anyway, unfortunately...)
If I remember correctly, on the TS-7350 the revision number is the least
significant 3 bits of the register at 0x600FF080.
> Regards,
> Andrea
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