Hi,
The schematic for the TS-7300 does not match the
physical board, or the documentation comments regarding
digital I/O.
The error I see is;
p1; EP9302 digital I/O nets are labeled DIO_00 to DIO_15
p5; DIO and LCD headers connect to nets DIO_00 to DIO_15
p7; FPGA digital I/O nets are labeled DIO3_00 to DIO3_17
p8; 40-pin header nets are labeled DIO_00 to DIO_17
So the implication of the schematic is that the 40-pin
header is connected to nets from the EP9302. The DIO3
nets go nowhere, implying that they are unconnected.
However, on the PCB, and in all the docs, the EP9302
DIO route to the headers DIO1 and LCD, while the
FPGA DIO route to DIO2.
Its pretty clear on the PCB by looking at the traces,
and by ohming them out. So, the schematic for the
board (at least the copy available to the public) appears
to be out-of-date with respect to the PCB.
Can someone please re-generate the PDF for the schematic
and let me know when I can download an updated copy.
Thanks!
Dave
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