--- In "BxWen" <> wrote:
>
> I am trying to generate patterns from TS7250 DIO. It seems to me even
> with assembly code the maximal rate is about 7Mhz or so. Given its
> 200Mhz CPU this is really slow.
>
> Can anyone point out how many clock cycles it takes to do
> " str r5, [r6]",
> where r6 point to PortB?
Pretty much all ARM instructions happen in one clock tick. Stores
actually have a write buffer, but depending on the MMU it may or may
not be enabled.
What will most likely be the bottleneck of this is the EP93xx internal
AMBA bus. Bus cycles to the GPIO go out the processor, through the
AHB bus, across the AHB/APB bridge, to the GPIO core on the APB bus.
The APB bus runs at 50Mhz, AHB at 100Mhz. There is also arbitration
for the internal bus that has to go on.. SDRAM, DMA, ethernet, etc,
and there may be AMBA wait states inserted on the bus cycles that
lengthen the cycle. Each time you branch, there is a CPU pipeline
flush since (IIRC) the ARM9 has no branch prediction which adds more
cycles. To know exactly the limitations, you'd really have to talk to
Cirrus Logic.
//Jesse Off
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