--- In anand bhavnani <> wrote:
>
> Hi all,
>
> thank your eddie.
>
> the additional device that i am connecting also has a low chip
select like the EEPROM on the board.
>
> so how should i take care of it
> also there is no SPI chip select signal, so what chip signal are u
talking about..
> the EEPROM uses EE_CS...
>
Anand,
Hope this helps.
SCLK, MOSI and MISO are shared by all the SPI chips connected to the
SPI bus. nSS1, nSS2, ... are any spare GPIO pins available. nSSx are
normally active low signals, so a 4.7K pull up resistor may be
beneficial to prevent the signal going low when the GPIO is set as
an input.
The diagram below should be in a fixed width font - if not paste it
into notepad with courier new font.
<code>
+--------------+
| SCLK o-----+-----------------+
| MOSI o-----|-+---------------|-+
| CPU MISO o-----|-|-+-------------|-|-+
| | | | | | | |
| nSS1 o---+ | | | | | |
| nSS2 o---|-|-|-|-----------+ | | |
| ... | | | | | | | | |
+--------------+ | | | | | | | |
| | | | | | | |
+-o-o-o-o-----+ +-o-o-o-o-----+
| | | |
| CHIP 1 | | CHIP 2 |
| | | |
+-------------+ +-------------+
</code>
This for SPI transfer:
Set SS1 Low
Send to Chip #1
Set SS1 High
Set SS2 Low
Send to Chip #2
Set SS2 High
etc..
Hope this helps,
PJE
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