Hi Eddie,
all of the jumpers are removed.
There are 4 SRAM chips on the board, U11, U12, U13, U14
yes, I didn't see that hidden bit in the table, A21
Here is the results of my test code and the code.
The output before "-----------------" is a loop which writes to
the NVRAM board and then reads the data back in. The output after is
a loop which reads the NVRAM board and writes the output.
can the repeating 0x10 be explained? It's got to be simple,
but I don't see it.
Thank you,
Craig
ts7200:/home/TS-7250/nvram# ./nvram
nvramfd 3
reg 2aac1000 mem 2abf4000
nvram 1 location 0 1
nvram 2 location 8000 2
nvram 3 location 10000 3
nvram 4 location 18000 4
nvram 5 location 20000 5
nvram 6 location 28000 6
nvram 7 location 30000 7
nvram 8 location 38000 8
nvram 9 location 40000 9
nvram a location 48000 a
nvram b location 50000 b
nvram c location 58000 c
nvram d location 60000 d
nvram e location 68000 e
nvram f location 70000 f
nvram 10 location 78000 10
nvram 11 location 80000 11
nvram 12 location 88000 12
nvram 13 location 90000 13
nvram 14 location 98000 14
nvram 15 location a0000 15
nvram 16 location a8000 16
nvram 17 location b0000 17
nvram 18 location b8000 18
nvram 19 location c0000 19
nvram 1a location c8000 1a
nvram 1b location d0000 1b
nvram 1c location d8000 1c
nvram 1d location e0000 1d
nvram 1e location e8000 1e
nvram 1f location f0000 1f
nvram 20 location f8000 20
--------------
nvram 1 location 0
nvram 2 location 8000
nvram 3 location 10000
nvram 4 location 18000
nvram 5 location 20000
nvram 6 location 28000
nvram 7 location 30000
nvram 8 location 38000
nvram 9 location 40000
nvram a location 48000
nvram b location 50000
nvram c location 58000
nvram d location 60000
nvram e location 68000
nvram f location 70000
nvram 10 location 78000
nvram 10 location 80000
nvram 10 location 88000
nvram 10 location 90000
nvram 10 location 98000
nvram 10 location a0000
nvram 10 location a8000
nvram 10 location b0000
nvram 10 location b8000
nvram 10 location c0000
nvram 10 location c8000
nvram 10 location d0000
nvram 10 location d8000
nvram 10 location e0000
nvram 10 location e8000
nvram 10 location f0000
nvram 10 location f8000
#include <unistd.h>
#include <sys/types.h>
#include <sys/mman.h>
#include <stdio.h>
#include <fcntl.h>
#include "nvram.h"
void nvram_init() {
int nvramfd;
unsigned int j;
unsigned short int k;
int status;
nvramfd=open("/dev/mem", O_RDWR|O_SYNC);
printf("nvramfd %d\n",nvramfd);
nvram_reg=(unsigned char *)mmap(0, getpagesize(),
PROT_READ|PROT_WRITE, MAP_SHARED,
nvramfd,NVRAM_BASE);
if(nvram_reg == (void *) -1) {
perror("mmap registers");
exit(1);
}
nvram_reg[NVRAM_MODE]=0x80;
nvram_start=(unsigned short int *)mmap(0, 2097152,
PROT_READ|PROT_WRITE, MAP_SHARED, nvramfd, NVRAM_MEM);
if(nvram_reg == (void *) -1) {
perror("mmap memory");
exit(1);
}
printf("reg %x mem %x\n",nvram_reg,nvram_start);
k=1;
for (j=0;j<2087152/2;j+=32768) {
nvram_start[j]=k;
/* slow, but force a write of the mapped data */
status=msync(nvram_start,2097152,MS_SYNC);
if (status == -1)
perror("nvram_reg1");
printf("nvram %x location %x %x\n",nvram_start[j],j,k);
k++;
}
sleep(1);
printf("--------------\n");
for (j=0;j<2087152/2;j+=32768) {
printf("nvram %x location %x\n",nvram_start[j],j);
}
}
main() {
nvram_init();
}
dawydiuk wrote:
> Hello,
>
> > I have a TS-NVRAM2 board connected to my TS-7250 and
> > can not see any more that 1MB of the 2MB board.
>
> Did you order the 2MB board? The simplest way to tell
> is to check if you have four SRAM chips, if so then you
> have a 2MB board. If you have only two SRAM chips then
> you have a 1MB board.
>
> > I have tried access the TS-NVRAM2 in linear and page
> > mode an I am unable to see more than 1 MB either way.
>
> When in linear mode ensure you are in 16 bit mode(JP3 and
> JP4 off).
>
> > The PC-104 bus on the TS-7250 has 21 address bits
> > which providesaccess to 1MB of the 2MB TS-NVRAM2 board,
> > when accessingthe NVRAM2 board via the base address of
> > 0x21800000.
> >
> > The TS-NVRAM2 documentation says that placing the
> > board in linear mode will give a TS-ARM access to all
> > 2MB for space, how is this possible without using page
> > mode if there are only 21 bits of address space?
>
> There are actually 22 address lines, which will provide up
> to 4MB of address space...
>
> > Also, the TS-NVRAM2 documentation says the base address
> > of the RAM is at 0x2A800000 when placed in linear mode.
> > I did not find that doing a mmap to the base address
> > of 0x2A800000 worked correctly, 0x21800000 worked.
>
> Sorry about that, it looks like there is a typo in the
> manual. I will ensure this gets updated to the proper
> address.
>
> //Eddie
>
>
>
>
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