the zip file contains a few files
there is the schematic that is a .ps file its in post script format
and there are gerber files for the pcb ,
you will need a gerber file viewer to view the gerber files
and a postscript viewer to veiw the schematic
so it should not be to hard to get a program to view them
gostview in linux and kpdf will view the .ps files
and there are a number of gerber viewers arround
im going to follow jesse's advice , and keep the data buffers , but
remove the address buffers ,and add a osc to the unit , although i
will still use the osc input from the pc/104 bus to the fpga also
,and //jesse off , yes i am interested in info on the loader
if it can be distributed that is
think i will also try to allow for a couple of the unused clock
inputs to be acesable externaly also
the only restrictions that i have is that i can not increase the
number of pcb layers (for cost reasons i don't want to use more than
2 layers with 2 power planes ) but can add other items without much
problems
and the pcb size is fixed also
Dave
--- In "ve3wdw" <> wrote:
>
> Hi
>
> I downloaded the zip file for your fpga project, can you tell me
what cad
> programme you are using so I can view the files.
>
> Thanks
>
> Dale Westwood
> _____
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