The first chip of SDRAM memory is on SDRAM chip select #3 which is
physical space 0x0 - 0x0fffffff the way we bootstrap the pins of the
processor. Memory is non-contiguous in this space and depends on the
size of the chip. A 32 MB chip is composed of 4 8MB chunks starting
at offsets 0x0, 0x1000000, 0x4000000, and 0x5000000 in this region.
The other three SDRAM chip selects start at offsets 0xc0000000,
0xd0000000, 0xe0000000. The TS-7250 with 64MB SDRAM has a second 32MB
chip at 0xe0000000.
The ep930[1,2] datasheet describes the details of the non-contiguous
nature of the way SDRAM chips are located throughout memory. This sort
of memory arrangement is very non-X86 and as such required a bit of
Linux VM system hacks that were not very fun to debug when we released
the TS-7250.
//Jesse Off
--- In "Ronald G. Minnich" <>
wrote:
> you mean, where the dram is mapped? I did figure that out a while
ago,
> since technologic was unable to get it to me. If that is what you
need,
> let me know and I'll try to find it.
>
> ron
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